1. 22 Jul, 2021 1 commit
  2. 21 Jul, 2021 4 commits
  3. 19 Jul, 2021 1 commit
  4. 17 Jul, 2021 1 commit
    • Carlo Caione's avatar
      drivers: syscon: Add generic syscon API · bc305984
      Carlo Caione authored
      
      A syscon device is a device managing a memory region containing a set of
      registers that are not cohesive enough to represent as any specific type
      of device. We need a driver for that because several other drivers could
      use the same region at the same time and we need to io-map the region at
      boot for MMU enabled platforms.
      Signed-off-by: default avatarCarlo Caione <ccaione@baylibre.com>
      bc305984
  5. 16 Jul, 2021 1 commit
  6. 15 Jul, 2021 1 commit
  7. 14 Jul, 2021 1 commit
  8. 13 Jul, 2021 1 commit
    • Thomas Stranger's avatar
      dts: arm: introduce seeed lora-e5 module · 15d8f1ea
      Thomas Stranger authored
      
      This commit adds the dts definitons for the seeed lora-e5 module.
      Additionally I add myself as codeowner for the new dts/arm/seeed
      directory.
      
      This module packages a stm32wle5jc Sub-GHz Wireless Soc,
      together with a 32MHz TCXO, a 32.768KHz crystal oscillator, and
      power and RF circuitry.
      
      With the introduction of lora support definitions for the radio
      will be added in a future commit.
      Signed-off-by: default avatarThomas Stranger <thomas.stranger@outlook.com>
      15d8f1ea
  9. 08 Jul, 2021 1 commit
  10. 02 Jul, 2021 1 commit
  11. 01 Jul, 2021 1 commit
  12. 28 Jun, 2021 1 commit
  13. 24 Jun, 2021 1 commit
  14. 23 Jun, 2021 1 commit
  15. 22 Jun, 2021 1 commit
  16. 18 Jun, 2021 3 commits
  17. 15 Jun, 2021 1 commit
  18. 12 Jun, 2021 1 commit
  19. 07 Jun, 2021 1 commit
  20. 18 May, 2021 1 commit
    • Bob Recny's avatar
      boards: arm: Modify BMD-345-EVAL support · 8039ab48
      Bob Recny authored
      
      Modify support for u-blox BMD-345-EVAL which uses the nRF52840
      and a Skyworks RFX2411 FEM.
      
      These edits follow the naming cnoventions that is used
      with the other u-blox EVKs recently added, or in progress
      
      This board is similar to the nRF52840dk_nrf52840 with the
      addition of a FEM. Four Arduino GPIO pins have been
      reassigned to the PA_LNA control pins.
      
      u-blox would prefer to use this naming convention to match
      other BMD-3xx-EVAL and EVK-NINA-Bx boards recently submitted.
      
      Tested with blinky, button, and Bluetooth peripheral_hr
      Checking dts files
      Updated CODEOWNERS to rename bmd_345_eval to ubx_bmd345eval_nrf52840
      Added CMakeLists.txt, updated board.c
      Signed-off-by: default avatarBob Recny <bob.recny@u-blox.com>
      8039ab48
  21. 11 May, 2021 1 commit
  22. 08 May, 2021 1 commit
    • Carlo Caione's avatar
      cache: Introduce external cache controller system support · e2333269
      Carlo Caione authored
      
      The cache API currently shipped in Zephyr is assuming that the cache
      controller is always on-core thus managed at the arch level. This is not
      always the case because many SoCs rely on external cache controllers as
      a peripheral external to the core (for example PL310 cache controller
      and the L2Cxxx family). In some cases you also want a single driver to
      control a whole set of cache controllers.
      
      Rework the cache code introducing support for external cache
      controllers.
      Signed-off-by: default avatarCarlo Caione <ccaione@baylibre.com>
      e2333269
  23. 07 May, 2021 2 commits
    • Andy Ross's avatar
      drivers/timer: Add x86 APIC TSC_DEADLINE driver · 662b0bf7
      Andy Ross authored
      
      Modern hardware all supports a TSC_DEADLINE mode for the APIC timer,
      where the same GHz-scale 64 bit TSC used for performance monitoring
      becomes the free-running counter used for cpu-local timer interrupts.
      Being a free running counter that does not need to be reset, it will
      not lose time in an interrupt.  Being 64 bit, it needs no rollover or
      clamping logic in the driver when presented with a 32 bit tick count.
      Being a proper comparator, it will correctly trigger interrupts for
      times set "in the past" and thus needs no minimum/clamping logic.  The
      counter is synchronized across the system architecturally (modulo one
      burp where firmware likes to change the adjustment value) so usage is
      SMP-safe by default.  Access to the 64 bit counter and comparator
      value are single-instruction atomics even on 32 bit systems, so it
      beats even the RISC-V machine timer in complexity (which was our
      reigning champ for "simplest timer driver").
      
      Really this is just ideal for Zephyr.  So rather than try to add
      support for it to the existing APIC driver and increase complexity,
      make this a new standalone driver instead.  All modern hardware has
      what it needs.  The sole gotcha is that it's not easily emulatable
      (qemu supports it only under kvm where they can freeload on the host
      TSC) so it can be exercised only on hardware platforms right now.
      Signed-off-by: default avatarAndy Ross <andrew.j.ross@intel.com>
      662b0bf7
    • Aymeric Aillet's avatar
      drivers: serial: add Renesas R-Car driver · c5a057bc
      Aymeric Aillet authored
      
      This patch add support for polling based UART
      on the Renesas R-Car SCIF (Serial Communication Interface
      with FIFO)
      
      This hardware block can be found on various Renesas R-Car
      SoC series.
      
      It allows to get console on R-Car Gen3 H3ULCB board.
      Signed-off-by: default avatarAymeric Aillet <aymeric.aillet@iot.bzh>
      c5a057bc
  24. 06 May, 2021 1 commit
    • Marcin Niestroj's avatar
      drivers: wifi: esp_at: rename driver from esp · b4854deb
      Marcin Niestroj authored
      
      Recently WiFi ESP32 driver (utilizing WiFi radio in ESP32 SoC) was
      introduced into drivers/wifi/esp32/ and it already caused confusion as
      there was existing drivers/wifi/esp/ directory for ESP-AT
      driver (utilizing external WiFi chip, by communicating using AT commands
      from any serial capable platform). So question has arisen whether it is
      good to merge both, while they are totally different drivers.
      
      Rename ESP-AT driver to be placed in drivers/wifi/esp_at/, so that it is
      easier to figure out difference between "esp32" and "esp_at" just by
      looking at driver name. Rename also DT compatible and all Kconfig
      options for the same reason.
      Signed-off-by: default avatarMarcin Niestroj <m.niestroj@grinn-global.com>
      b4854deb
  25. 05 May, 2021 3 commits
  26. 30 Apr, 2021 1 commit
  27. 28 Apr, 2021 1 commit
  28. 27 Apr, 2021 3 commits
    • Daniel Leung's avatar
      kernel: generate placeholders for kobj tables before final build · 11171699
      Daniel Leung authored
      
      Due to the use of gperf to generate hash table for kobjects,
      the addresses of these kobjects cannot change during the last
      few phases of linking (especially between zephyr_prebuilt.elf
      and zephyr.elf). Because of this, the gperf generated data
      needs to be placed at the end of memory to avoid pushing symbols
      around in memory. This prevents moving these generated blocks
      to earlier sections, for example, pinned data section needed
      for demand paging. So create placeholders for use in
      intermediate linking to reserve space for these generated blocks.
      Due to uncertainty on the size of these blocks, more space is
      being reserved which could result in wasted space. Though, this
      retains the use of hash table for faster lookup.
      Signed-off-by: default avatarDaniel Leung <daniel.leung@intel.com>
      11171699
    • Carlo Caione's avatar
      board: arm64: Add FVP Base RevC 2xAEMv8A board · 0427d93f
      Carlo Caione authored
      
      Add support for the FVP Base RevC 2xAEMv8A board to be emulated using
      the same FVP. For now the virtual platform is only exposing one core and
      the basic set of peripherals (GICv3, ARM arch timer, PL011, etc...).
      
      INFO    - Total complete:  256/ 256  100%  skipped:  933, failed:    0
      Signed-off-by: default avatarCarlo Caione <ccaione@baylibre.com>
      0427d93f
    • Erwan Gouriou's avatar
      CODEOWNERS: Add code owner for dts/common · 45418ded
      Erwan Gouriou authored
      
      Add @galak as codeowner for dts/common
      Signed-off-by: default avatarErwan Gouriou <erwan.gouriou@linaro.org>
      45418ded
  29. 22 Apr, 2021 2 commits