- 22 Jul, 2021 1 commit
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Francois Ramu authored
All the macro for dma-cells are now in the include/drivers/dma/dma_stm32.h header file. So the include/dt-bindings/dma/stm32_dma.h is no more useful and removed from #include. Signed-off-by: Francois Ramu <francois.ramu@st.com>
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- 21 Jul, 2021 4 commits
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Anas Nashif authored
Add action and scripts for footprint tracking. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
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Yuriy Vynnychek authored
Serial driver basic support for new Telink B91 platform. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
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Yuriy Vynnychek authored
Pinmux driver basic support for new Telink B91 platform. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
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Yuriy Vynnychek authored
GPIO driver basic support for new Telink B91 platform. Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
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- 19 Jul, 2021 1 commit
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Jun Lin authored
Move @MulinChao, @WealianLiao, and myself from code owners entry dts/arm/nuvoton/npcx to dts/arm/nuvoton. So we will be chosen as reviewers automatically when dtsi files under dts/arm/nuvoton are touched. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
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- 17 Jul, 2021 1 commit
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Carlo Caione authored
A syscon device is a device managing a memory region containing a set of registers that are not cohesive enough to represent as any specific type of device. We need a driver for that because several other drivers could use the same region at the same time and we need to io-map the region at boot for MMU enabled platforms. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
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- 16 Jul, 2021 1 commit
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Glauber Maroto Ferreira authored
Add interrupt allocation support for ESP32. Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
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- 15 Jul, 2021 1 commit
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Aymeric Aillet authored
This patch add support for I2C on the Renesas R-Car. This I2C hardware block can be found on various Renesas R-Car SoC series. It allows to perfom read and write on I2C buses in an interrupt based way on R-Car Gen3 H3ULCB board. Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
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- 14 Jul, 2021 1 commit
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Thomas Stranger authored
This commit adds a serial dummy driver compatible to vnd,serial. This is needed that devices can access the uart device in tests like tests/drivers/build_all/... . Add myself as codeowner to avoid complicance check failure. Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
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- 13 Jul, 2021 1 commit
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Thomas Stranger authored
This commit adds the dts definitons for the seeed lora-e5 module. Additionally I add myself as codeowner for the new dts/arm/seeed directory. This module packages a stm32wle5jc Sub-GHz Wireless Soc, together with a 32MHz TCXO, a 32.768KHz crystal oscillator, and power and RF circuitry. With the introduction of lora support definitions for the radio will be added in a future commit. Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
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- 08 Jul, 2021 1 commit
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Felipe Neves authored
Also added maintainer to the entry Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com> Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
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- 02 Jul, 2021 1 commit
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Jun Lin authored
Add Nuvoton developers as code owners for npcx PS/2 driver. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
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- 01 Jul, 2021 1 commit
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Ruibin Chang authored
Add pulse width modulator (PWM) for it8xxx2. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
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- 28 Jun, 2021 1 commit
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Jose Alberto Meza authored
Not enough time to review changes in these subsystems. Propose to have VenkatKotakonda as KSCAN subsystem owner instead. Adding SoC-specific driver owners. Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
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- 24 Jun, 2021 1 commit
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Immo Birnbaum authored
Add the code owner entries for all files related to the Xilinx GEM Ethernet device driver. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
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- 23 Jun, 2021 1 commit
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Jukka Rissanen authored
I cannot invest the time required for maintaining the networking stack anymore, so I am stepping down from the maintainer role. I am proposing Rober Lubos to be a new network maintainer. I have been working with him for several years, and he is always very helpful and knowledgeable to review and comment patches and issues. He knows the network stack well and will for sure be able to handle the task as he has been doing the maintenance already for a long time. Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com> Acked-by: Robert Lubos <robert.lubos@nordicsemi.no>
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- 22 Jun, 2021 1 commit
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Rajnesh Kanwal authored
Adding support for beagleV Starlight board based on Starfive JH7100 SoC. It's a base support, no drivers other than uart has been tested. Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal49@gmail.com>
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- 18 Jun, 2021 3 commits
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Henrik Brix Andersen authored
Include the samples/drivers/eeprom folder under the EEPROM maintainer area. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
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Henrik Brix Andersen authored
Convert the keyscan portion of the Holtek HT16K33 driver to adhere to the kscan API instead of the GPIO API. When this driver was introduced the kscan API was not present. The keyscan driver was therefore implemented as a GPIO interrupt driver. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
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Ruibin Chang authored
Add watchdog timer for it8xxx2. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
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- 15 Jun, 2021 1 commit
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Emil Gydesen authored
Adds @Thalley and @asbjornsabo (and the others from the parent directory) to the babblesim audio test directory. Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
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- 12 Jun, 2021 1 commit
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NavinSankar Velliangiri authored
This PR add sample application for minimal lz4 library. lz4 library RFC requested here: #28535 Fixes: #26648 Signed-off-by: NavinSankar Velliangiri <navin@linumiz.com>
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- 07 Jun, 2021 1 commit
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Julien Massot authored
This driver is for classic CAN, it makes use of CAN interface in FIFO mode. This driver support Standard ID as well as Extended ID. Tested on H3ULCB, Ebisu platform, with external adapter and in loopback mode. Signed-off-by: Julien Massot <julien.massot@iot.bzh>
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- 18 May, 2021 1 commit
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Bob Recny authored
Modify support for u-blox BMD-345-EVAL which uses the nRF52840 and a Skyworks RFX2411 FEM. These edits follow the naming cnoventions that is used with the other u-blox EVKs recently added, or in progress This board is similar to the nRF52840dk_nrf52840 with the addition of a FEM. Four Arduino GPIO pins have been reassigned to the PA_LNA control pins. u-blox would prefer to use this naming convention to match other BMD-3xx-EVAL and EVK-NINA-Bx boards recently submitted. Tested with blinky, button, and Bluetooth peripheral_hr Checking dts files Updated CODEOWNERS to rename bmd_345_eval to ubx_bmd345eval_nrf52840 Added CMakeLists.txt, updated board.c Signed-off-by: Bob Recny <bob.recny@u-blox.com>
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- 11 May, 2021 1 commit
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Siddharth Chandrasekaran authored
GitHub username @cbsiddharth was changed to @sidcha. Update CODEOWNERS and MAINTAINERS.yml entries. Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
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- 08 May, 2021 1 commit
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Carlo Caione authored
The cache API currently shipped in Zephyr is assuming that the cache controller is always on-core thus managed at the arch level. This is not always the case because many SoCs rely on external cache controllers as a peripheral external to the core (for example PL310 cache controller and the L2Cxxx family). In some cases you also want a single driver to control a whole set of cache controllers. Rework the cache code introducing support for external cache controllers. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
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- 07 May, 2021 2 commits
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Andy Ross authored
Modern hardware all supports a TSC_DEADLINE mode for the APIC timer, where the same GHz-scale 64 bit TSC used for performance monitoring becomes the free-running counter used for cpu-local timer interrupts. Being a free running counter that does not need to be reset, it will not lose time in an interrupt. Being 64 bit, it needs no rollover or clamping logic in the driver when presented with a 32 bit tick count. Being a proper comparator, it will correctly trigger interrupts for times set "in the past" and thus needs no minimum/clamping logic. The counter is synchronized across the system architecturally (modulo one burp where firmware likes to change the adjustment value) so usage is SMP-safe by default. Access to the 64 bit counter and comparator value are single-instruction atomics even on 32 bit systems, so it beats even the RISC-V machine timer in complexity (which was our reigning champ for "simplest timer driver"). Really this is just ideal for Zephyr. So rather than try to add support for it to the existing APIC driver and increase complexity, make this a new standalone driver instead. All modern hardware has what it needs. The sole gotcha is that it's not easily emulatable (qemu supports it only under kvm where they can freeload on the host TSC) so it can be exercised only on hardware platforms right now. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
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Aymeric Aillet authored
This patch add support for polling based UART on the Renesas R-Car SCIF (Serial Communication Interface with FIFO) This hardware block can be found on various Renesas R-Car SoC series. It allows to get console on R-Car Gen3 H3ULCB board. Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
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- 06 May, 2021 1 commit
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Marcin Niestroj authored
Recently WiFi ESP32 driver (utilizing WiFi radio in ESP32 SoC) was introduced into drivers/wifi/esp32/ and it already caused confusion as there was existing drivers/wifi/esp/ directory for ESP-AT driver (utilizing external WiFi chip, by communicating using AT commands from any serial capable platform). So question has arisen whether it is good to merge both, while they are totally different drivers. Rename ESP-AT driver to be placed in drivers/wifi/esp_at/, so that it is easier to figure out difference between "esp32" and "esp_at" just by looking at driver name. Rename also DT compatible and all Kconfig options for the same reason. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
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- 05 May, 2021 3 commits
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Gerard Marull-Paretas authored
Adjust naming to make things more consistent. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
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Gerard Marull-Paretas authored
Adjust naming to make things consistent. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
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Gerard Marull-Paretas authored
- Move PM related APIs to `include/pm` so that it follows API `pm_` prefix namespace. In order to make transition easier `include/power/power.h` is kept pointing to `include/pm/pm.h`. - Move most of device PM related content from `include/device.h` to `include/pm/device.h` and `include/pm/runtime.h`. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
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- 30 Apr, 2021 1 commit
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Kalyan Sriram authored
Add @coderkalyan (Kalyan Sriram <coder.kalyan@gmail.com>) as code owner for blackpill_f401ce, blackpill_f411ce boards. Signed-off-by: Kalyan Sriram <kalyan@coderkalyan.com>
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- 28 Apr, 2021 1 commit
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Daniel Leung authored
This adds dictionary based logging support. Dictionary based logging is binary based where one big difference is that static strings are stored as pointers instead of the whole string. This results in reduced space requirements for storing log messages in certain scenairos. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
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- 27 Apr, 2021 3 commits
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Daniel Leung authored
Due to the use of gperf to generate hash table for kobjects, the addresses of these kobjects cannot change during the last few phases of linking (especially between zephyr_prebuilt.elf and zephyr.elf). Because of this, the gperf generated data needs to be placed at the end of memory to avoid pushing symbols around in memory. This prevents moving these generated blocks to earlier sections, for example, pinned data section needed for demand paging. So create placeholders for use in intermediate linking to reserve space for these generated blocks. Due to uncertainty on the size of these blocks, more space is being reserved which could result in wasted space. Though, this retains the use of hash table for faster lookup. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
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Carlo Caione authored
Add support for the FVP Base RevC 2xAEMv8A board to be emulated using the same FVP. For now the virtual platform is only exposing one core and the basic set of peripherals (GICv3, ARM arch timer, PL011, etc...). INFO - Total complete: 256/ 256 100% skipped: 933, failed: 0 Signed-off-by: Carlo Caione <ccaione@baylibre.com>
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Erwan Gouriou authored
Add @galak as codeowner for dts/common Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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- 22 Apr, 2021 2 commits
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Kumar Gala authored
Move emul.h out of the top level include/ dir into include/drivers/emul.h and deprecated the old location. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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Jiafei Pan authored
1. add a seperate 2 cores SMP board configuration to run in Jailhouse inmate Cell, root Cell Linux will use Core0 and Core1, Zephyr will run on Core2 and Core3. 2. Refine the code of dts, move SoC common dts nodes into dtsi fiel in dts/arm64/nxp/ directory. 3. Add myself to be code owner of directory dts/arm64/nxp/. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
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