Commit 80ff3d33 authored by Paul Durrant's avatar Paul Durrant Committed by Jan Beulich

iommu: tidy up iommu_use_hap_pt() and need_iommu_pt_sync() macros

Thes macros really ought to live in the common xen/iommu.h header rather
then being distributed amongst architecture specific iommu headers and
xen/sched.h. This patch moves them there.

NOTE: Disabling 'sharept' in the command line iommu options should really
      be hard error on ARM (as opposed to just being ignored), so define
      'iommu_hap_pt_share' to be true for ARM (via ARM-selected
      CONFIG_IOMMU_FORCE_PT_SHARE).
Signed-off-by: default avatarPaul Durrant <paul.durrant@citrix.com>
Reviewed-by: default avatarJan Beulich <jbeulich@suse.com>
Acked-by: default avatarJulien Grall <julien.grall@arm.com>
parent f89f5558
......@@ -20,6 +20,7 @@ config ARM
select HAS_DEVICE_TREE
select HAS_PASSTHROUGH
select HAS_PDX
select IOMMU_FORCE_PT_SHARE
config ARCH_DEFCONFIG
string
......
......@@ -13,3 +13,6 @@ config ARM_SMMU
Say Y here if your SoC includes an IOMMU device implementing the
ARM SMMU architecture.
endif
config IOMMU_FORCE_PT_SHARE
bool
......@@ -20,9 +20,6 @@ struct arch_iommu
void *priv;
};
/* Always share P2M Table between the CPU and the IOMMU */
#define iommu_use_hap_pt(d) is_iommu_enabled(d)
const struct iommu_ops *iommu_get_ops(void);
void iommu_set_ops(const struct iommu_ops *ops);
......
......@@ -86,10 +86,6 @@ struct iommu_init_ops {
extern const struct iommu_init_ops *iommu_init_ops;
/* Are we using the domain P2M table as its IOMMU pagetable? */
#define iommu_use_hap_pt(d) \
(hap_enabled(d) && is_iommu_enabled(d) && iommu_hap_pt_share)
void iommu_update_ire_from_apic(unsigned int apic, unsigned int reg, unsigned int value);
unsigned int iommu_read_apic_from_ire(unsigned int apic, unsigned int reg);
int iommu_setup_hpet_msi(struct msi_desc *);
......
......@@ -56,7 +56,9 @@ extern bool_t iommu_enable, iommu_enabled;
extern bool_t force_iommu, iommu_verbose, iommu_igfx;
extern bool_t iommu_snoop, iommu_qinval, iommu_intremap, iommu_intpost;
#ifdef CONFIG_HVM
#if defined(CONFIG_IOMMU_FORCE_PT_SHARE)
#define iommu_hap_pt_share true
#elif defined(CONFIG_HVM)
extern bool iommu_hap_pt_share;
#else
#define iommu_hap_pt_share false
......@@ -288,6 +290,17 @@ struct domain_iommu {
#define iommu_set_feature(d, f) set_bit(f, dom_iommu(d)->features)
#define iommu_clear_feature(d, f) clear_bit(f, dom_iommu(d)->features)
/* Are we using the domain P2M table as its IOMMU pagetable? */
#define iommu_use_hap_pt(d) \
(hap_enabled(d) && is_iommu_enabled(d) && iommu_hap_pt_share)
/* Does the IOMMU pagetable need to be kept synchronized with the P2M */
#ifdef CONFIG_HAS_PASSTHROUGH
#define need_iommu_pt_sync(d) (dom_iommu(d)->need_sync)
#else
#define need_iommu_pt_sync(d) ({ (void)(d); false; })
#endif
int __must_check iommu_suspend(void);
void iommu_resume(void);
void iommu_crash_shutdown(void);
......
......@@ -965,12 +965,6 @@ static inline bool is_hwdom_pinned_vcpu(const struct vcpu *v)
cpumask_weight(v->cpu_hard_affinity) == 1);
}
#ifdef CONFIG_HAS_PASSTHROUGH
#define need_iommu_pt_sync(d) (dom_iommu(d)->need_sync)
#else
#define need_iommu_pt_sync(d) false
#endif
static inline bool is_vcpu_online(const struct vcpu *v)
{
return !test_bit(_VPF_down, &v->pause_flags);
......
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