Commit 53b705d0 authored by Ayan Kumar Halder's avatar Ayan Kumar Halder Committed by Julien Grall

xen/arm64: io: Handle data abort due to cache maintenance instructions

When the data abort is caused due to cache maintenance for an address,
there are three scenarios:-

1. Address belonging to a non emulated region - For this, Xen should
set the corresponding bit in the translation table entry to valid and
return to the guest to retry the instruction. This can happen sometimes
as Xen need to set the translation table entry to invalid. (for eg
'Break-Before-Make' sequence). Xen returns to the guest to retry the
instruction.

2. Address belongs to an emulated region - Xen should ignore the
instruction (ie increment the PC) and return to the guest.

3. Address is invalid - Xen should forward the data abort to the guest.
Signed-off-by: default avatarAyan Kumar Halder <ayankuma@xilinx.com>
[julien: Don't initialize p.size to 1 << info->dabt.size]
Reviewed-by: default avatarJulien Grall <jgrall@amazon.com>
parent fa6dc087
......@@ -35,6 +35,7 @@ enum instr_decode_state
* instruction.
*/
INSTR_LDR_STR_POSTINDEXING,
INSTR_CACHE, /* Cache Maintenance instr */
};
typedef struct
......
......@@ -139,6 +139,17 @@ void try_decode_instruction(const struct cpu_user_regs *regs,
return;
}
/*
* When the data abort is caused due to cache maintenance, Xen should check
* if the address belongs to an emulated MMIO region or not. The behavior
* will differ accordingly.
*/
if ( info->dabt.cache )
{
info->dabt_instr.state = INSTR_CACHE;
return;
}
/*
* Armv8 processor does not provide a valid syndrome for decoding some
* instructions. So in order to process these instructions, Xen must
......@@ -161,7 +172,7 @@ enum io_state try_handle_mmio(struct cpu_user_regs *regs,
ASSERT(info->dabt.ec == HSR_EC_DATA_ABORT_LOWER_EL);
if ( !info->dabt.valid )
if ( !(info->dabt.valid || (info->dabt_instr.state == INSTR_CACHE)) )
{
ASSERT_UNREACHABLE();
return IO_ABORT;
......@@ -177,6 +188,13 @@ enum io_state try_handle_mmio(struct cpu_user_regs *regs,
return rc;
}
/*
* When the data abort is caused due to cache maintenance and the address
* belongs to an emulated region, Xen should ignore this instruction.
*/
if ( info->dabt_instr.state == INSTR_CACHE )
return IO_HANDLED;
/*
* At this point, we know that the instruction is either valid or has been
* decoded successfully. Thus, Xen should be allowed to execute the
......
......@@ -47,12 +47,11 @@ enum io_state try_fwd_ioserv(struct cpu_user_regs *regs,
struct vcpu *v, mmio_info_t *info)
{
struct vcpu_io *vio = &v->io;
struct instr_details instr = info->dabt_instr;
const struct instr_details instr = info->dabt_instr;
struct hsr_dabt dabt = info->dabt;
ioreq_t p = {
.type = IOREQ_TYPE_COPY,
.addr = info->gpa,
.size = 1 << info->dabt.size,
.count = 1,
.dir = !info->dabt.write,
/*
......@@ -62,7 +61,6 @@ enum io_state try_fwd_ioserv(struct cpu_user_regs *regs,
* memory access. So for now, we can safely always set to 0.
*/
.df = 0,
.data = get_user_reg(regs, info->dabt.reg),
.state = STATE_IOREQ_READY,
};
struct ioreq_server *s = NULL;
......@@ -74,12 +72,25 @@ enum io_state try_fwd_ioserv(struct cpu_user_regs *regs,
return IO_ABORT;
}
if ( instr.state == INSTR_CACHE )
p.size = dcache_line_bytes;
else
p.size = 1U << info->dabt.size;
s = ioreq_server_select(v->domain, &p);
if ( !s )
return IO_UNHANDLED;
/*
* When the data abort is caused due to cache maintenance and the address
* belongs to an emulated region, Xen should ignore this instruction.
*/
if ( instr.state == INSTR_CACHE )
return IO_HANDLED;
ASSERT(dabt.valid);
p.data = get_user_reg(regs, info->dabt.reg);
vio->req = p;
vio->info.dabt_instr = instr;
......
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