diff --git a/fsi_master.v b/fsi_master.v
index 66defef8251a63dd53ceb03d13c73099bc73b8aa..196ca4f7786d7da12d18b29c26021151f7e5b5db 100644
--- a/fsi_master.v
+++ b/fsi_master.v
@@ -158,6 +158,7 @@ module fsi_master_interface(
 	always @(posedge peripheral_clock) begin
 		if (peripheral_reset) begin
 			cycle_complete_reg <= 0;
+			rx_data <= 0;
 			last_address_valid <= 0;
 			ipoll_in_process <= 0;
 			busy_response_in_process <= 0;
@@ -719,6 +720,7 @@ module fsi_master_interface(
 							end else begin
 								// Transfer complete!
 								if (!ipoll_in_process) begin
+									rx_data <= rx_data_reg;
 									cycle_complete_reg <= 1;
 								end
 								busy_response_in_process <= 0;