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Raptor Engineering Public Development
lpc-spi-bridge-fpga
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1c8c6714dfc5b5c1246043ca8bba4214c45cff27
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lpc-spi-bridge-fpga
main.v
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Split main state machine clock from LPC clock to better meet critical LPC timing constraints
· 1c8c6714
Raptor Engineering Development Team
authored
Apr 28, 2020
1c8c6714
main.v
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