1. 15 Aug, 2016 2 commits
  2. 19 Sep, 2014 1 commit
    • meissner's avatar
      2014-09-19 Michael Meissner <meissner@linux.vnet.ibm.com> · 1e495278
      meissner authored
      	Back port from trunk:
      	2014-09-19  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* config/rs6000/predicates.md (fusion_gpr_mem_load): Move testing
      	for base_reg_operand to be common between LO_SUM and PLUS.
      	(fusion_gpr_mem_combo): New predicate to match a fused address
      	that combines the addis and memory offset address.
      
      	* config/rs6000/rs6000-protos.h (fusion_gpr_load_p): Change
      	calling signature.
      	(emit_fusion_gpr_load): Likewise.
      
      	* config/rs6000/rs6000.c (fusion_gpr_load_p): Change calling
      	signature to pass each argument separately, rather than
      	using an operands array.  Rewrite the insns found by peephole2 to
      	be a single insn, rather than hoping the insns will still be
      	together when the peephole pass is done.  Drop being called via a
      	normal peephole.
      	(emit_fusion_gpr_load): Change calling signature to be called from
      	the fusion_gpr_load_<mode> insns with a combined memory address
      	instead of the peephole pass passing the addis and offset
      	separately.
      
      	* config/rs6000/rs6000.md (UNSPEC_FUSION_GPR): New unspec for GPR
      	fusion.
      	(power8 fusion peephole): Drop support for doing power8 via a
      	normal peephole that was created by the peephole2 pass.
      	(power8 fusion peephole2): Create a new insn with the fused
      	address, so that the fused operation is kept together after
      	register allocation is done.
      	(fusion_gpr_load_<mode>): Likewise.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215405 138bc75d-0d04-0410-961f-82ee72b054a4
      1e495278
  3. 24 Jul, 2014 1 commit
    • uweigand's avatar
      gcc/ · 50ee62fb
      uweigand authored
      	* config/rs6000/rs6000-protos.h (rs6000_special_adjust_field_align_p):
      	Add prototype.
      	* config/rs6000/rs6000.c (rs6000_special_adjust_field_align_p): New
      	function.  Issue -Wpsabi warning if future GCC releases will use
      	different field alignment rules for this type.
      	* config/rs6000/sysv4.h (ADJUST_FIELD_ALIGN): Call it.
      	* config/rs6000/linux64.h (ADJUST_FIELD_ALIGN): Likewise.
      	* config/rs6000/freebsd64.h (ADJUST_FIELD_ALIGN): Likewise.
      
      gcc/testsuite/
      
      	* gcc.target/powerpc/ppc64-abi-warn-3.c: New test.
      
      	* gcc.c-torture/execute/20050316-1.x: Add -Wno-psabi.
      	* gcc.c-torture/execute/20050604-1.x: Add -Wno-psabi.
      	* gcc.c-torture/execute/20050316-3.x: New file.  Add -Wno-psabi.
      	* gcc.c-torture/execute/pr23135.x: Likewise.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213021 138bc75d-0d04-0410-961f-82ee72b054a4
      50ee62fb
  4. 11 Jun, 2014 1 commit
    • amodra's avatar
      PR target/61300 · ed32fd7c
      amodra authored
      	* doc/tm.texi.in (INCOMING_REG_PARM_STACK_SPACE): Document.
      	* doc/tm.texi: Regenerate.
      	* function.c (INCOMING_REG_PARM_STACK_SPACE): Provide default.
      	Use throughout in place of REG_PARM_STACK_SPACE.
      	* config/rs6000/rs6000.c (rs6000_reg_parm_stack_space): Add
      	"incoming" param.  Pass to rs6000_function_parms_need_stack.
      	(rs6000_function_parms_need_stack): Add "incoming" param, ignore
      	prototype_p when incoming.  Use function decl when incoming
      	to handle K&R style functions.
      	* config/rs6000/rs6000.h (REG_PARM_STACK_SPACE): Adjust.
      	(INCOMING_REG_PARM_STACK_SPACE): Define.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@211482 138bc75d-0d04-0410-961f-82ee72b054a4
      ed32fd7c
  5. 13 Mar, 2014 1 commit
    • meissner's avatar
      [gcc] · ae61c502
      meissner authored
      2014-03-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* config/rs6000/vector.md (VEC_L): Add V1TI mode to vector types.
      	(VEC_M): Likewise.
      	(VEC_N): Likewise.
      	(VEC_R): Likewise.
      	(VEC_base): Likewise.
      	(mov<MODE>, VEC_M modes): If we are loading TImode into VSX
      	registers, we need to swap double words in little endian mode.
      
      	* config/rs6000/rs6000-modes.def (V1TImode): Add new vector mode
      	to be a container mode for 128-bit integer operations added in ISA
      	2.07.  Unlike TImode and PTImode, the preferred register set is
      	the Altivec/VMX registers for the 128-bit operations.
      
      	* config/rs6000/rs6000-protos.h (rs6000_move_128bit_ok_p): Add
      	declarations.
      	(rs6000_split_128bit_ok_p): Likewise.
      
      	* config/rs6000/rs6000-builtin.def (BU_P8V_AV_3): Add new support
      	macros for creating ISA 2.07 normal and overloaded builtin
      	functions with 3 arguments.
      	(BU_P8V_OVERLOAD_3): Likewise.
      	(VPERM_1T): Add support for V1TImode in 128-bit vector operations
      	for use as overloaded functions.
      	(VPERM_1TI_UNS): Likewise.
      	(VSEL_1TI): Likewise.
      	(VSEL_1TI_UNS): Likewise.
      	(ST_INTERNAL_1ti): Likewise.
      	(LD_INTERNAL_1ti): Likewise.
      	(XXSEL_1TI): Likewise.
      	(XXSEL_1TI_UNS): Likewise.
      	(VPERM_1TI): Likewise.
      	(VPERM_1TI_UNS): Likewise.
      	(XXPERMDI_1TI): Likewise.
      	(SET_1TI): Likewise.
      	(LXVD2X_V1TI): Likewise.
      	(STXVD2X_V1TI): Likewise.
      	(VEC_INIT_V1TI): Likewise.
      	(VEC_SET_V1TI): Likewise.
      	(VEC_EXT_V1TI): Likewise.
      	(EQV_V1TI): Likewise.
      	(NAND_V1TI): Likewise.
      	(ORC_V1TI): Likewise.
      	(VADDCUQ): Add support for 128-bit integer arithmetic instructions
      	added in ISA 2.07.  Add both normal 'altivec' builtins, and the
      	overloaded builtin.
      	(VADDUQM): Likewise.
      	(VSUBCUQ): Likewise.
      	(VADDEUQM): Likewise.
      	(VADDECUQ): Likewise.
      	(VSUBEUQM): Likewise.
      	(VSUBECUQ): Likewise.
      
      	* config/rs6000/rs6000-c.c (__int128_type): New static to hold
      	__int128_t and __uint128_t types.
      	(__uint128_type): Likewise.
      	(altivec_categorize_keyword): Add support for vector __int128_t,
      	vector __uint128_t, vector __int128, and vector unsigned __int128
      	as a container type for TImode operations that need to be done in
      	VSX/Altivec registers.
      	(rs6000_macro_to_expand): Likewise.
      	(altivec_overloaded_builtins): Add ISA 2.07 overloaded functions
      	to support 128-bit integer instructions vaddcuq, vadduqm,
      	vaddecuq, vaddeuqm, vsubcuq, vsubuqm, vsubecuq, vsubeuqm.
      	(altivec_resolve_overloaded_builtin): Add support for V1TImode.
      
      	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Add support
      	for V1TImode, and set up preferences to use VSX/Altivec
      	registers.  Setup VSX reload handlers.
      	(rs6000_debug_reg_global): Likewise.
      	(rs6000_init_hard_regno_mode_ok): Likewise.
      	(rs6000_preferred_simd_mode): Likewise.
      	(vspltis_constant): Do not allow V1TImode as easy altivec
      	constants.
      	(easy_altivec_constant): Likewise.
      	(output_vec_const_move): Likewise.
      	(rs6000_expand_vector_set): Convert V1TImode set and extract to
      	simple move.
      	(rs6000_expand_vector_extract): Likewise.
      	(reg_offset_addressing_ok_p): Setup V1TImode to use VSX reg+reg
      	addressing.
      	(rs6000_const_vec): Add support for V1TImode.
      	(rs6000_emit_le_vsx_load): Swap double words when loading or
      	storing TImode/V1TImode.
      	(rs6000_emit_le_vsx_store): Likewise.
      	(rs6000_emit_le_vsx_move): Likewise.
      	(rs6000_emit_move): Add support for V1TImode.
      	(altivec_expand_ld_builtin): Likewise.
      	(altivec_expand_st_builtin): Likewise.
      	(altivec_expand_vec_init_builtin): Likewise.
      	(altivec_expand_builtin): Likewise.
      	(rs6000_init_builtins): Add support for V1TImode type.  Add
      	support for ISA 2.07 128-bit integer builtins.  Define type names
      	for the VSX/Altivec vector types.
      	(altivec_init_builtins): Add support for overloaded vector
      	functions with V1TImode type.
      	(rs6000_preferred_reload_class): Prefer Altivec registers for
      	V1TImode.
      	(rs6000_move_128bit_ok_p): Move 128-bit move/split validation to
      	external function.
      	(rs6000_split_128bit_ok_p): Likewise.
      	(rs6000_handle_altivec_attribute): Create V1TImode from vector
      	__int128_t and vector __uint128_t.
      
      	* config/rs6000/vsx.md (VSX_L): Add V1TImode to vector iterators
      	and mode attributes.
      	(VSX_M): Likewise.
      	(VSX_M2): Likewise.
      	(VSm): Likewise.
      	(VSs): Likewise.
      	(VSr): Likewise.
      	(VSv): Likewise.
      	(VS_scalar): Likewise.
      	(VS_double): Likewise.
      	(vsx_set_v1ti): New builtin function to create V1TImode from
      	TImode.
      
      	* config/rs6000/rs6000.h (TARGET_VADDUQM): New macro to say
      	whether we support the ISA 2.07 128-bit integer arithmetic
      	instructions.
      	(ALTIVEC_OR_VSX_VECTOR_MODE): Add V1TImode.
      	(enum rs6000_builtin_type_index): Add fields to hold V1TImode
      	and TImode types for use with the builtin functions.
      	(V1TI_type_node): Likewise.
      	(unsigned_V1TI_type_node): Likewise.
      	(intTI_type_internal_node): Likewise.
      	(uintTI_type_internal_node): Likewise.
      
      	* config/rs6000/altivec.md (UNSPEC_VADDCUQ): New unspecs for ISA
      	2.07 128-bit builtin functions.
      	(UNSPEC_VADDEUQM): Likewise.
      	(UNSPEC_VADDECUQ): Likewise.
      	(UNSPEC_VSUBCUQ): Likewise.
      	(UNSPEC_VSUBEUQM): Likewise.
      	(UNSPEC_VSUBECUQ): Likewise.
      	(VM): Add V1TImode to vector mode iterators.
      	(VM2): Likewise.
      	(VI_unit): Likewise.
      	(altivec_vadduqm): Add ISA 2.07 128-bit binary builtins.
      	(altivec_vaddcuq): Likewise.
      	(altivec_vsubuqm): Likewise.
      	(altivec_vsubcuq): Likewise.
      	(altivec_vaddeuqm): Likewise.
      	(altivec_vaddecuq): Likewise.
      	(altivec_vsubeuqm): Likewise.
      	(altivec_vsubecuq): Likewise.
      
      	* config/rs6000/rs6000.md (FMOVE128_GPR): Add V1TImode to vector
      	mode iterators.
      	(BOOL_128): Likewise.
      	(BOOL_REGS_OUTPUT): Likewise.
      	(BOOL_REGS_OP1): Likewise.
      	(BOOL_REGS_OP2): Likewise.
      	(BOOL_REGS_UNARY): Likewise.
      	(BOOL_REGS_AND_CR0): Likewise.
      
      	* config/rs6000/altivec.h (vec_vaddcuq): Add support for ISA 2.07
      	128-bit integer builtin support.
      	(vec_vadduqm): Likewise.
      	(vec_vaddecuq): Likewise.
      	(vec_vaddeuqm): Likewise.
      	(vec_vsubecuq): Likewise.
      	(vec_vsubeuqm): Likewise.
      	(vec_vsubcuq): Likewise.
      	(vec_vsubuqm): Likewise.
      
      	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
      	Document vec_vaddcuq, vec_vadduqm, vec_vaddecuq, vec_vaddeuqm,
      	vec_subecuq, vec_subeuqm, vec_vsubcuq, vec_vsubeqm builtins adding
      	128-bit integer add/subtract to ISA 2.07.
      
      [gcc/testsuite]
      2014-03-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* gcc.target/powerpc/p8vector-int128-1.c: New test to test ISA
      	2.07 128-bit arithmetic.
      	* gcc.target/powerpc/p8vector-int128-2.c: Likewise.
      
      	* gcc.target/powerpc/timode_off.c: Restrict cpu type to power5,
      	due to when TImode is allowed in VSX registers, the allowable
      	address modes for TImode is just a single indirect address in
      	order for the value to be loaded and store in either GPR or VSX
      	registers.  This affects the generated code, and it would cause
      	this test to fail, when such an option is used.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208522 138bc75d-0d04-0410-961f-82ee72b054a4
      ae61c502
  6. 23 Feb, 2014 1 commit
    • wschmidt's avatar
      gcc: · 6f73f6fe
      wschmidt authored
      2014-02-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
      
      	* config/rs6000/altivec.md (altivec_lve<VI_char>x): Replace
      	define_insn with define_expand and new define_insn
      	*altivec_lve<VI_char>x_internal.
      	(altivec_stve<VI_char>x): Replace define_insn with define_expand
      	and new define_insn *altivec_stve<VI_char>x_internal.
      	* config/rs6000/rs6000-protos.h (altivec_expand_stvex_be): New
      	prototype.
      	* config/rs6000/rs6000.c (altivec_expand_lvx_be): Document use by
      	lve*x built-ins.
      	(altivec_expand_stvex_be): New function.
      
      gcc/testsuite:
      
      2014-02-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
      
      	* gcc.dg/vmx/lde.c: New test.
      	* gcc.dg/vmx/lde-be-order.c: New test.
      	* gcc.dg/vmx/ste.c: New test.
      	* gcc.dg/vmx/ste-be-order.c: New test.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208049 138bc75d-0d04-0410-961f-82ee72b054a4
      6f73f6fe
  7. 21 Feb, 2014 1 commit
    • wschmidt's avatar
      gcc: · b2633cce
      wschmidt authored
      2014-02-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
      
      	* config/rs6000/altivec.md (altivec_lvxl): Rename as
      	*altivec_lvxl_<mode>_internal and use VM2 iterator instead of
      	V4SI.
      	(altivec_lvxl_<mode>): New define_expand incorporating
      	-maltivec=be semantics where needed.
      	(altivec_lvx): Rename as *altivec_lvx_<mode>_internal.
      	(altivec_lvx_<mode>): New define_expand incorporating -maltivec=be
      	semantics where needed.
      	(altivec_stvx): Rename as *altivec_stvx_<mode>_internal.
      	(altivec_stvx_<mode>): New define_expand incorporating
      	-maltivec=be semantics where needed.
      	(altivec_stvxl): Rename as *altivec_stvxl_<mode>_internal and use
      	VM2 iterator instead of V4SI.
      	(altivec_stvxl_<mode>): New define_expand incorporating
      	-maltivec=be semantics where needed.
      	* config/rs6000/rs6000-builtin.def: Add new built-in definitions
      	LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI, LVXL_V16QI,
      	LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI, LVX_V8HI, LVX_V16QI,
      	STVX_V2DF, STVX_V2DI, STVX_V4SF, STVX_V4SI, STVX_V8HI, STVX_V16QI,
      	STVXL_V2DF, STVXL_V2DI, STVXL_V4SF, STVXL_V4SI, STVXL_V8HI,
      	STVXL_V16QI.
      	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Replace
      	ALTIVEC_BUILTIN_LVX with ALTIVEC_BUILTIN_LVX_<MODE> throughout;
      	similarly for ALTIVEC_BUILTIN_LVXL, ALTIVEC_BUILTIN_STVX, and
      	ALTIVEC_BUILTIN_STVXL.
      	* config/rs6000/rs6000-protos.h (altivec_expand_lvx_be): New
      	prototype.
      	(altivec_expand_stvx_be): Likewise.
      	* config/rs6000/rs6000.c (swap_selector_for_mode): New function.
      	(altivec_expand_lvx_be): Likewise.
      	(altivec_expand_stvx_be): Likewise.
      	(altivec_expand_builtin): Add cases for
      	ALTIVEC_BUILTIN_STVX_<MODE>, ALTIVEC_BUILTIN_STVXL_<MODE>,
      	ALTIVEC_BUILTIN_LVXL_<MODE>, and ALTIVEC_BUILTIN_LVX_<MODE>.
      	(altivec_init_builtins): Add definitions for
      	__builtin_altivec_lvxl_<mode>, __builtin_altivec_lvx_<mode>,
      	__builtin_altivec_stvx_<mode>, and
      	__builtin_altivec_stvxl_<mode>.
      
      
      gcc/testsuite:
      
      2014-02-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
      
      	* gcc.dg/vmx/ld.c: New test.
      	* gcc.dg/vmx/ld-be-order.c: New test.
      	* gcc.dg/vmx/ld-vsx.c: New test.
      	* gcc.dg/vmx/ld-vsx-be-order.c: New test.
      	* gcc.dg/vmx/ldl.c: New test.
      	* gcc.dg/vmx/ldl-be-order.c: New test.
      	* gcc.dg/vmx/ldl-vsx.c: New test.
      	* gcc.dg/vmx/ldl-vsx-be-order.c: New test.
      	* gcc.dg/vmx/st.c: New test.
      	* gcc.dg/vmx/st-be-order.c: New test.
      	* gcc.dg/vmx/st-vsx.c: New test.
      	* gcc.dg/vmx/st-vsx-be-order.c: New test.
      	* gcc.dg/vmx/stl.c: New test.
      	* gcc.dg/vmx/stl-be-order.c: New test.
      	* gcc.dg/vmx/stl-vsx.c: New test.
      	* gcc.dg/vmx/stl-vsx-be-order.c: New test.
      
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208019 138bc75d-0d04-0410-961f-82ee72b054a4
      b2633cce
  8. 02 Jan, 2014 1 commit
  9. 14 Nov, 2013 2 commits
    • uweigand's avatar
      gcc/ChangeLog: · 238f342d
      uweigand authored
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      	    Alan Modra  <amodra@gmail.com>
      
      	* config/rs6000/rs6000.h (RS6000_SAVE_AREA): Handle ABI_ELFv2.
      	(RS6000_SAVE_TOC): Remove.
      	(RS6000_TOC_SAVE_SLOT): New macro.
      	* config/rs6000/rs6000.c (rs6000_parm_offset): New function.
      	(rs6000_parm_start): Use it.
      	(rs6000_function_arg_advance_1): Likewise.
      	(rs6000_emit_prologue): Use RS6000_TOC_SAVE_SLOT.
      	(rs6000_emit_epilogue): Likewise.
      	(rs6000_call_aix): Likewise.
      	(rs6000_output_function_prologue): Do not save/restore r11
      	around calling _mcount for ABI_ELFv2.
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      	    Alan Modra  <amodra@gmail.com>
      
      	* config/rs6000/rs6000-protos.h (rs6000_reg_parm_stack_space):
      	Add prototype.
      	* config/rs6000/rs6000.h (RS6000_REG_SAVE): Remove.
      	(REG_PARM_STACK_SPACE): Call rs6000_reg_parm_stack_space.
      	* config/rs6000/rs6000.c (rs6000_parm_needs_stack): New function.
      	(rs6000_function_parms_need_stack): Likewise.
      	(rs6000_reg_parm_stack_space): Likewise.
      	(rs6000_function_arg): Do not replace BLKmode by Pmode when
      	returning a register argument.
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      	    Michael Gschwind  <mkg@us.ibm.com>
      
      	* config/rs6000/rs6000.h (FP_ARG_MAX_RETURN): New macro.
      	(ALTIVEC_ARG_MAX_RETURN): Likewise.
      	(FUNCTION_VALUE_REGNO_P): Use them.
      	* config/rs6000/rs6000.c (TARGET_RETURN_IN_MSB): Define.
      	(rs6000_return_in_msb): New function.
      	(rs6000_return_in_memory): Handle ELFv2 homogeneous aggregates.
      	Handle aggregates of up to 16 bytes for ELFv2.
      	(rs6000_function_value): Handle ELFv2 homogeneous aggregates.
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      	    Michael Gschwind  <mkg@us.ibm.com>
      
      	* config/rs6000/rs6000.h (AGGR_ARG_NUM_REG): Define.
      	* config/rs6000/rs6000.c (rs6000_aggregate_candidate): New function.
      	(rs6000_discover_homogeneous_aggregate): Likewise.
      	(rs6000_function_arg_boundary): Handle homogeneous aggregates.
      	(rs6000_function_arg_advance_1): Likewise.
      	(rs6000_function_arg): Likewise.
      	(rs6000_arg_partial_bytes): Likewise.
      	(rs6000_psave_function_arg): Handle BLKmode arguments.
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      	    Michael Gschwind  <mkg@us.ibm.com>
      
      	* config/rs6000/rs6000.h (AGGR_ARG_NUM_REG): Define.
      	* config/rs6000/rs6000.c (rs6000_aggregate_candidate): New function.
      	(rs6000_discover_homogeneous_aggregate): Likewise.
      	(rs6000_function_arg_boundary): Handle homogeneous aggregates.
      	(rs6000_function_arg_advance_1): Likewise.
      	(rs6000_function_arg): Likewise.
      	(rs6000_arg_partial_bytes): Likewise.
      	(rs6000_psave_function_arg): Handle BLKmode arguments.
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      
      	* config/rs6000/rs6000.c (machine_function): New member
      	r2_setup_needed.
      	(rs6000_emit_prologue): Set r2_setup_needed if necessary.
      	(rs6000_output_mi_thunk): Set r2_setup_needed.
      	(rs6000_output_function_prologue): Output global entry point
      	prologue and local entry point marker if needed for ABI_ELFv2.
      	Output -mprofile-kernel code here.
      	(output_function_profiler): Do not output -mprofile-kernel
      	code here; moved to rs6000_output_function_prologue.
      	(rs6000_file_start): Output ".abiversion 2" for ABI_ELFv2.
      
      	(rs6000_emit_move): Do not handle dot symbols for ABI_ELFv2.
      	(rs6000_output_function_entry): Likewise.
      	(rs6000_assemble_integer): Likewise.
      	(rs6000_elf_encode_section_info): Likewise.
      	(rs6000_elf_declare_function_name): Do not create dot symbols
      	or .opd section for ABI_ELFv2.
      
      	(rs6000_trampoline_size): Update for ABI_ELFv2 trampolines.
      	(rs6000_trampoline_init): Likewise.
      	(rs6000_elf_file_end): Call file_end_indicate_exec_stack
      	for ABI_ELFv2.
      
      	(rs6000_call_aix): Handle ELFv2 indirect calls.  Do not check
      	for function descriptors in ABI_ELFv2.
      
      	* config/rs6000/rs6000.md ("*call_indirect_aix<mode>"): Support
      	on ABI_AIX only, not ABI_ELFv2.
      	("*call_value_indirect_aix<mode>"): Likewise.
      	("*call_indirect_elfv2<mode>"): New pattern.
      	("*call_value_indirect_elfv2<mode>"): Likewise.
      
      	* config/rs6000/predicates.md ("symbol_ref_operand"): Do not
      	check for function descriptors in ABI_ELFv2.
      	("current_file_function_operand"): Likewise.
      
      	* config/rs6000/ppc-asm.h [__powerpc64__ && _CALL_ELF == 2]:
      	(toc): Undefine.
      	(FUNC_NAME): Define ELFv2 variant.
      	(JUMP_TARGET): Likewise.
      	(FUNC_START): Likewise.
      	(HIDDEN_FUNC): Likewise.
      	(FUNC_END): Likeiwse.
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      
      	* config.gcc [powerpc*-*-* | rs6000-*-*]: Support --with-abi=elfv1
      	and --with-abi=elfv2.
      	* config/rs6000/option-defaults.h (OPTION_DEFAULT_SPECS): Add "abi".
      	* config/rs6000/rs6000.opt (mabi=elfv1): New option.
      	(mabi=elfv2): Likewise.
      	* config/rs6000/rs6000-opts.h (enum rs6000_abi): Add ABI_ELFv2.
      	* config/rs6000/linux64.h (DEFAULT_ABI): Do not hard-code to AIX_ABI
      	if !RS6000_BI_ARCH.
      	(ELFv2_ABI_CHECK): New macro.
      	(SUBSUBTARGET_OVERRIDE_OPTIONS): Use it to decide whether to set
      	rs6000_current_abi to ABI_AIX or ABI_ELFv2.
      	(GLIBC_DYNAMIC_LINKER64): Support ELFv2 ld.so version.
      	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Predefine
      	_CALL_ELF and __STRUCT_PARM_ALIGN__ if appropriate.
      
      	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Handle ABI_ELFv2.
      	(debug_stack_info): Likewise.
      	(rs6000_file_start): Treat ABI_ELFv2 the same as ABI_AIX.
      	(rs6000_legitimize_tls_address): Likewise.
      	(rs6000_conditional_register_usage): Likewise.
      	(rs6000_emit_move): Likewise.
      	(init_cumulative_args): Likewise.
      	(rs6000_function_arg_advance_1): Likewise.
      	(rs6000_function_arg): Likewise.
      	(rs6000_arg_partial_bytes): Likewise.
      	(rs6000_output_function_entry): Likewise.
      	(rs6000_assemble_integer): Likewise.
      	(rs6000_savres_strategy): Likewise.
      	(rs6000_stack_info): Likewise.
      	(rs6000_function_ok_for_sibcall): Likewise.
      	(rs6000_emit_load_toc_table): Likewise.
      	(rs6000_savres_routine_name): Likewise.
      	(ptr_regno_for_savres): Likewise.
      	(rs6000_emit_prologue): Likewise.
      	(rs6000_emit_epilogue): Likewise.
      	(rs6000_output_function_epilogue): Likewise.
      	(output_profile_hook): Likewise.
      	(output_function_profiler): Likewise.
      	(rs6000_trampoline_size): Likewise.
      	(rs6000_trampoline_init): Likewise.
      	(rs6000_elf_output_toc_section_asm_op): Likewise.
      	(rs6000_elf_encode_section_info): Likewise.
      	(rs6000_elf_reloc_rw_mask): Likewise.
      	(rs6000_elf_declare_function_name): Likewise.
      	(rs6000_function_arg_boundary): Treat ABI_ELFv2 the same as ABI_AIX,
      	except that rs6000_compat_align_parm is always assumed false.
      	(rs6000_gimplify_va_arg): Likewise.
      	(rs6000_call_aix): Update comment.
      	(rs6000_sibcall_aix): Likewise.
      	* config/rs6000/rs6000.md ("tls_gd_aix<TLSmode:tls_abi_suffix>"):
      	Treat ABI_ELFv2 the same as ABI_AIX.
      	("*tls_gd_call_aix<TLSmode:tls_abi_suffix>"): Likewise.
      	("tls_ld_aix<TLSmode:tls_abi_suffix>"): Likewise.
      	("*tls_ld_call_aix<TLSmode:tls_abi_suffix>"): Likewise.
      	("load_toc_aix_si"): Likewise.
      	("load_toc_aix_di"): Likewise.
      	("call"): Likewise.
      	("call_value"): Likewise.
      	("*call_local_aix<mode>"): Likewise.
      	("*call_value_local_aix<mode>"): Likewise.
      	("*call_nonlocal_aix<mode>"): Likewise.
      	("*call_value_nonlocal_aix<mode>"): Likewise.
      	("*call_indirect_aix<mode>"): Likewise.
      	("*call_value_indirect_aix<mode>"): Likewise.
      	("sibcall"): Likewise.
      	("sibcall_value"): Likewise.
      	("*sibcall_aix<mode>"): Likewise.
      	("*sibcall_value_aix<mode>"): Likewise.
      	* config/rs6000/predicates.md ("symbol_ref_operand"): Likewise.
      	("current_file_function_operand"): Likewise.
      
      gcc/testsuite/ChangeLog:
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      
      	* gcc.target/powerpc/ppc64-abi-1.c (stack_frame_t): Remove
      	compiler and linker field if _CALL_ELF == 2.
      	* gcc.target/powerpc/ppc64-abi-2.c (stack_frame_t): Likewise.
      	* gcc.target/powerpc/ppc64-abi-dfp-1.c (stack_frame_t): Likewise.
      	* gcc.dg/stack-usage-1.c (SIZE): Update value for _CALL_ELF == 2.
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      
      	* gcc.target/powerpc/ppc64-abi-dfp-1.c (FUNC_START): New macro.
      	(WRAPPER): Use it.
      	* gcc.target/powerpc/no-r11-1.c: Skip on powerpc_elfv2.
      	* gcc.target/powerpc/no-r11-2.c: Skip on powerpc_elfv2.
      	* gcc.target/powerpc/no-r11-3.c: Skip on powerpc_elfv2.
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      
      	* lib/target-supports.exp (check_effective_target_powerpc_elfv2):
      	New function.
      	* gcc.target/powerpc/pr57949-1.c: Disable for powerpc_elfv2.
      	* gcc.target/powerpc/pr57949-2.c: Likewise.
      
      libgcc/ChangeLog:
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      	    Alan Modra  <amodra@gmail.com>
      
      	* config/rs6000/linux-unwind.h (TOC_SAVE_SLOT): Define.
      	(frob_update_context): Use it.
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      	    Alan Modra  <amodra@gmail.com>
      
      	* config/rs6000/tramp.S [__powerpc64__ && _CALL_ELF == 2]:
      	(trampoline_initial): Provide ELFv2 variant.
      	(__trampoline_setup): Likewise.
      
      	* config/rs6000/linux-unwind.h (frob_update_context): Do not
      	check for AIX indirect function call sequence if _CALL_ELF == 2.
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      	    Alan Modra  <amodra@gmail.com>
      
      	* config/rs6000/linux-unwind.h (get_regs): Do not support
      	old kernel versions if _CALL_ELF == 2.
      	(frob_update_context): Do not support PLT stub variants only
      	generated by old linkers if _CALL_ELF == 2.
      
      libitm/ChangeLog:
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      
      	* config/powerpc/sjlj.S [__powerpc64__ && _CALL_ELF == 2]:
      	(FUNC): Define ELFv2 variant.
      	(END): Likewise.
      	(HIDDEN): Likewise.
      	(CALL): Likewise.
      	(BASE): Likewise.
      	(LR_SAVE): Likewise.
      
      libstdc++/ChangeLog:
      
      2013-11-14  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
      
      	* scripts/extract_symvers.in: Ignore <localentry: > fields
      	in readelf --symbols output.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@204808 138bc75d-0d04-0410-961f-82ee72b054a4
      238f342d
    • uweigand's avatar
      2013-11-14 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> · eddcc604
      uweigand authored
      	* config/rs6000/rs6000.c (rs6000_call_indirect_aix): Rename to ...
      	(rs6000_call_aix): ... this.  Handle both direct and indirect calls.
      	Create call insn directly instead of via various gen_... routines.
      	Mention special registers used by the call in CALL_INSN_FUNCTION_USAGE.
      	(rs6000_sibcall_aix): New function.
      	* config/rs6000/rs6000.md (TOC_SAVE_OFFSET_32BIT): Remove.
      	(TOC_SAVE_OFFSET_64BIT): Likewise.
      	(AIX_FUNC_DESC_TOC_32BIT): Likewise.
      	(AIX_FUNC_DESC_TOC_64BIT): Likewise.
      	(AIX_FUNC_DESC_SC_32BIT): Likewise.
      	(AIX_FUNC_DESC_SC_64BIT): Likewise.
      	("call" expander): Call rs6000_call_aix.
      	("call_value" expander): Likewise.
      	("call_indirect_aix<ptrsize>"): Replace this pattern ...
      	("call_indirect_aix<ptrsize>_nor11"): ... and this pattern ...
      	("*call_indirect_aix<mode>"): ... by this insn pattern.
      	("call_value_indirect_aix<ptrsize>"): Replace this pattern ...
      	("call_value_indirect_aix<ptrsize>_nor11"): ... and this pattern ...
      	("*call_value_indirect_aix<mode>"): ... by this insn pattern.
      	("*call_nonlocal_aix32", "*call_nonlocal_aix64"): Replace by ...
      	("*call_nonlocal_aix<mode>"): ... this pattern.
      	("*call_value_nonlocal_aix32", "*call_value_nonlocal_aix64"): Replace
      	("*call_value_nonlocal_aix<mode>"): ... by this pattern.
      	("*call_local_aix<mode>"): New insn pattern.
      	("*call_value_local_aix<mode>"): Likewise.
      	("sibcall" expander): Call rs6000_sibcall_aix.
      	("sibcall_value" expander): Likewise.  Move earlier in file.
      	("*sibcall_nonlocal_aix<mode>"): Replace by ...
      	("*sibcall_aix<mode>"): ... this pattern.
      	("*sibcall_value_nonlocal_aix<mode>"): Replace by ...
      	("*sibcall_value_aix<mode>"): ... this pattern.
      	* config/rs6000/rs6000-protos.h (rs6000_call_indirect_aix): Remove.
      	(rs6000_call_aix): Add prototype.
      	(rs6000_sibcall_aix): Likewise.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@204803 138bc75d-0d04-0410-961f-82ee72b054a4
      eddcc604
  10. 04 Nov, 2013 1 commit
    • jsm28's avatar
      * doc/cpp.texi (__GCC_IEC_559, __GCC_IEC_559_COMPLEX): Document · 4c866b9b
      jsm28 authored
      	macros.
      	* target.def (float_exceptions_rounding_supported_p): New hook.
      	* targhooks.c (default_float_exceptions_rounding_supported_p): New
      	function.
      	* targhooks.h (default_float_exceptions_rounding_supported_p):
      	Declare.
      	* doc/tm.texi.in (TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P):
      	New @hook.
      	* doc/tm.texi: Regenerate.
      	* config.gcc (powerpc*-*-linux*): Set extra_objs.
      	* config/rs6000/rs6000-linux.c: New file.
      	* config/rs6000/rs6000-protos.h
      	(rs6000_linux_float_exceptions_rounding_supported_p): Declare.
      	* config/rs6000/linux.h
      	(TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P): New macro.
      	* config/rs6000/linux64.h
      	(TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P): Likewise.
      	* config/rs6000/t-linux (rs6000-linux.o): New rule.
      	* config/rs6000/t-linux64 (rs6000-linux.o): Likewise.
      
      c-family:
      	* c-cppbuiltin.c (cpp_iec_559_value, cpp_iec_559_complex_value):
      	New functions.
      	(c_cpp_builtins): Define __GCC_IEC_559 and __GCC_IEC_559_COMPLEX.
      
      testsuite:
      	* gcc.dg/iec-559-macros-1.c, gcc.dg/iec-559-macros-2.c,
      	gcc.dg/iec-559-macros-3.c, gcc.dg/iec-559-macros-4.c,
      	gcc.dg/iec-559-macros-5.c, gcc.dg/iec-559-macros-6.c,
      	gcc.dg/iec-559-macros-7.c, gcc.dg/iec-559-macros-8.c,
      	gcc.dg/iec-559-macros-9.c: New tests.
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@204351 138bc75d-0d04-0410-961f-82ee72b054a4
      4c866b9b
  11. 25 Oct, 2013 1 commit
    • vmakarov's avatar
      2013-10-25 Vladimir Makarov <vmakarov@redhat.com> · bcdf945c
      vmakarov authored
      	* config/rs6000/rs6000-protos.h
      	(rs6000_secondary_memory_needed_mode): New prototype.
      	* config/rs6000/rs6000.c: Include ira.h.
      	(TARGET_LRA_P): Redefine.
      	(rs6000_legitimate_offset_address_p): Call
      	legitimate_constant_pool_address_p in strict mode for LRA.
      	(rs6000_legitimate_address_p): Ditto.
      	(legitimate_lo_sum_address_p): Add code for LRA.
      	Use lra_in_progress.
      	(rs6000_emit_move): Add LRA version of code to generate load/store
      	of SDmode values.
      	(rs6000_secondary_memory_needed_mode): New.
      	(rs6000_alloc_sdmode_stack_slot): Do nothing for LRA.
      	(rs6000_secondary_reload_class): Return NO_REGS for LRA for
      	constants, memory, and FP registers.
      	(rs6000_lra_p): New.
      	* config/rs6000/rs6000.h (SECONDARY_MEMORY_NEEDED_MODE): New
      	macro.
      	* config/rs6000/rs6000.opt (mlra): New option.
      	* lra-spills.c (lra_final_code_change): Remove useless move insns.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@204079 138bc75d-0d04-0410-961f-82ee72b054a4
      bcdf945c
  12. 11 Oct, 2013 1 commit
    • wschmidt's avatar
      2013-10-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com> · f711c984
      wschmidt authored
      	* config/rs6000/vector.md (vec_realign_load<mode>): Generate vperm
      	directly to circumvent subtract from splat{31} workaround.
      	* config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_le): New
      	prototype.
      	* config/rs6000/rs6000.c (altivec_expand_vec_perm_le): New.
      	* config/rs6000/altivec.md (define_c_enum "unspec"): Add
      	UNSPEC_VPERM_X and UNSPEC_VPERM_UNS_X.
      	(altivec_vperm_<mode>): Convert to define_insn_and_split to
      	separate big and little endian logic.
      	(*altivec_vperm_<mode>_internal): New define_insn.
      	(altivec_vperm_<mode>_uns): Convert to define_insn_and_split to
      	separate big and little endian logic.
      	(*altivec_vperm_<mode>_uns_internal): New define_insn.
      	(vec_permv16qi): Add little endian logic.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203457 138bc75d-0d04-0410-961f-82ee72b054a4
      f711c984
  13. 07 Oct, 2013 1 commit
    • wschmidt's avatar
      gcc: · b9543d21
      wschmidt authored
      2013-10-07  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
      
      	* config/rs6000/vector.md (mov<mode>): Emit permuted move
      	sequences for LE VSX loads and stores at expand time.
      	* config/rs6000/rs6000-protos.h (rs6000_emit_le_vsx_move): New
      	prototype.
      	* config/rs6000/rs6000.c (rs6000_const_vec): New.
      	(rs6000_gen_le_vsx_permute): New.
      	(rs6000_gen_le_vsx_load): New.
      	(rs6000_gen_le_vsx_store): New.
      	(rs6000_gen_le_vsx_move): New.
      	* config/rs6000/vsx.md (*vsx_le_perm_load_v2di): New.
      	(*vsx_le_perm_load_v4si): New.
      	(*vsx_le_perm_load_v8hi): New.
      	(*vsx_le_perm_load_v16qi): New.
      	(*vsx_le_perm_store_v2di): New.
      	(*vsx_le_perm_store_v4si): New.
      	(*vsx_le_perm_store_v8hi): New.
      	(*vsx_le_perm_store_v16qi): New.
      	(*vsx_xxpermdi2_le_<mode>): New.
      	(*vsx_xxpermdi4_le_<mode>): New.
      	(*vsx_xxpermdi8_le_V8HI): New.
      	(*vsx_xxpermdi16_le_V16QI): New.
      	(*vsx_lxvd2x2_le_<mode>): New.
      	(*vsx_lxvd2x4_le_<mode>): New.
      	(*vsx_lxvd2x8_le_V8HI): New.
      	(*vsx_lxvd2x16_le_V16QI): New.
      	(*vsx_stxvd2x2_le_<mode>): New.
      	(*vsx_stxvd2x4_le_<mode>): New.
      	(*vsx_stxvd2x8_le_V8HI): New.
      	(*vsx_stxvd2x16_le_V16QI): New.
      
      gcc/testsuite:
      
      2013-10-07  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
      
      	* gcc.target/powerpc/pr43154.c: Skip for ppc64 little endian.
      	* gcc.target/powerpc/fusion.c: Likewise.
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203246 138bc75d-0d04-0410-961f-82ee72b054a4
      b9543d21
  14. 16 Aug, 2013 1 commit
    • meissner's avatar
      2013-08-14 Michael Meissner <meissner@linux.vnet.ibm.com> · af2b033f
      meissner authored
      	PR target/58160
      	* config/rs6000/predicates.md (fusion_gpr_mem_load): Allow the
      	memory rtx to contain ZERO_EXTEND and SIGN_EXTEND.
      
      	* config/rs6000/rs6000-protos.h (fusion_gpr_load_p): Pass operands
      	array instead of each individual operand as a separate argument.
      	(emit_fusion_gpr_load): Likewise.
      	(expand_fusion_gpr_load): Add new function declaration.
      
      	* config/rs6000/rs6000.c (fusion_gpr_load_p): Change the calling
      	signature to have the operands passed as an array, instead of as
      	separate arguments.  Allow ZERO_EXTEND to be in the memory
      	address, and also SIGN_EXTEND if -mpower8-fusion-sign.  Do not
      	depend on the register live/dead flags when peepholes are run.
      	(expand_fusion_gpr_load): New function to be called from the
      	peephole2 pass, to change the register that addis sets to be the
      	target register.
      	(emit_fusion_gpr_load): Change the calling signature to have the
      	operands passed as an array, instead of as separate arguments.
      	Allow ZERO_EXTEND to be in the memory address, and also
      	SIGN_EXTEND if -mpower8-fusion-sign.
      
      	* config/rs6000/rs6000.md (UNSPEC_FUSION_GPR): Delete unused
      	unspec enumeration.
      	(power8 fusion peephole/peephole2): Rework the fusion peepholes to
      	adjust the register addis loads up in the peephole2 pass.  Do not
      	depend on the register live/dead state when the peephole pass is
      	done.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201792 138bc75d-0d04-0410-961f-82ee72b054a4
      af2b033f
  15. 31 Jul, 2013 1 commit
    • meissner's avatar
      [gcc] · a081294b
      meissner authored
      2013-07-31  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* config/rs6000/predicates.md (fusion_gpr_addis): New predicates
      	to support power8 load fusion.
      	(fusion_gpr_mem_load): Likewise.
      
      	* config/rs6000/rs6000-modes.def (PTImode): Update a comment.
      
      	* config/rs6000/rs6000-protos.h (fusion_gpr_load_p): New
      	declarations for power8 load fusion.
      	(emit_fusion_gpr_load): Likewise.
      
      	* config/rs6000/rs6000.c (rs6000_option_override_internal): If
      	tuning for power8, turn on fusion mode by default.  Turn on sign
      	extending fusion mode if normal fusion mode is on, and we are at
      	-O2 or -O3.
      	(fusion_gpr_load_p): New function, return true if we can fuse an
      	addis instruction with a dependent load to a GPR.
      	(emit_fusion_gpr_load): Emit the instructions for power8 load
      	fusion to GPRs.
      
      	* config/rs6000/vsx.md (VSX_M2): New iterator for fusion
      	peepholes.
      	(VSX load fusion peepholes): New peepholes to fuse together an
      	addi instruction with a VSX load instruction.
      
      	* config/rs6000/rs6000.md (GPR load fusion peepholes): New
      	peepholes to fuse an addis instruction with a load to a GPR base
      	register.  If we are supporting sign extending fusions, convert
      	sign extending loads to zero extending loads and add an explicit
      	sign extension.
      
      [gcc/testsuite]
      2013-07-31  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* gcc.target/powerpc/fusion.c: New file, test power8 fusion
      	support.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201385 138bc75d-0d04-0410-961f-82ee72b054a4
      a081294b
  16. 23 Jul, 2013 1 commit
    • meissner's avatar
      [gcc] · 91bf8773
      meissner authored
      2013-07-23  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* config/rs6000/vector.md (xor<mode>3): Move 128-bit boolean
      	expanders to rs6000.md.
      	(ior<mode>3): Likewise.
      	(and<mode>3): Likewise.
      	(one_cmpl<mode>2): Likewise.
      	(nor<mode>3): Likewise.
      	(andc<mode>3): Likewise.
      	(eqv<mode>3): Likewise.
      	(nand<mode>3): Likewise.
      	(orc<mode>3): Likewise.
      
      	* config/rs6000/rs6000-protos.h (rs6000_split_logical): New
      	declaration.
      
      	* config/rs6000/rs6000.c (rs6000_split_logical_inner): Add support
      	to split multi-word logical operations.
      	(rs6000_split_logical_di): Likewise.
      	(rs6000_split_logical): Likewise.
      
      	* config/rs6000/vsx.md (VSX_L2): Delete, no longer used.
      	(vsx_and<mode>3_32bit): Move 128-bit logical insns to rs6000.md,
      	and allow TImode operations in 32-bit.
      	(vsx_and<mode>3_64bit): Likewise.
      	(vsx_ior<mode>3_32bit): Likewise.
      	(vsx_ior<mode>3_64bit): Likewise.
      	(vsx_xor<mode>3_32bit): Likewise.
      	(vsx_xor<mode>3_64bit): Likewise.
      	(vsx_one_cmpl<mode>2_32bit): Likewise.
      	(vsx_one_cmpl<mode>2_64bit): Likewise.
      	(vsx_nor<mode>3_32bit): Likewise.
      	(vsx_nor<mode>3_64bit): Likewise.
      	(vsx_andc<mode>3_32bit): Likewise.
      	(vsx_andc<mode>3_64bit): Likewise.
      	(vsx_eqv<mode>3_32bit): Likewise.
      	(vsx_eqv<mode>3_64bit): Likewise.
      	(vsx_nand<mode>3_32bit): Likewise.
      	(vsx_nand<mode>3_64bit): Likewise.
      	(vsx_orc<mode>3_32bit): Likewise.
      	(vsx_orc<mode>3_64bit): Likewise.
      
      	* config/rs6000/rs6000.h (VLOGICAL_REGNO_P): Always allow vector
      	logical types in GPRs.
      
      	* config/rs6000/altivec.md (altivec_and<mode>3): Move 128-bit
      	logical insns to rs6000.md, and allow TImode operations in
      	32-bit.
      	(altivec_ior<mode>3): Likewise.
      	(altivec_xor<mode>3): Likewise.
      	(altivec_one_cmpl<mode>2): Likewise.
      	(altivec_nor<mode>3): Likewise.
      	(altivec_andc<mode>3): Likewise.
      
      	* config/rs6000/rs6000.md (BOOL_128): New mode iterators and mode
      	attributes for moving the 128-bit logical operations into
      	rs6000.md.
      	(BOOL_REGS_OUTPUT): Likewise.
      	(BOOL_REGS_OP1): Likewise.
      	(BOOL_REGS_OP2): Likewise.
      	(BOOL_REGS_UNARY): Likewise.
      	(BOOL_REGS_AND_CR0): Likewise.
      	(one_cmpl<mode>2): Add support for DI logical operations on
      	32-bit, splitting the operations to 32-bit.
      	(anddi3): Likewise.
      	(iordi3): Likewise.
      	(xordi3): Likewise.
      	(and<mode>3, 128-bit types): Rewrite 2013-06-06 logical operator
      	changes to combine the 32/64-bit code, allow logical operations on
      	TI mode in 32-bit, and to use similar match_operator patterns like
      	scalar mode uses.  Combine the Altivec and VSX code for logical
      	operations, and move it here.
      	(ior<mode>3, 128-bit types): Likewise.
      	(xor<mode>3, 128-bit types): Likewise.
      	(one_cmpl<mode>3, 128-bit types): Likewise.
      	(nor<mode>3, 128-bit types): Likewise.
      	(andc<mode>3, 128-bit types): Likewise.
      	(eqv<mode>3, 128-bit types): Likewise.
      	(nand<mode>3, 128-bit types): Likewise.
      	(orc<mode>3, 128-bit types): Likewise.
      	(and<mode>3_internal): Likewise.
      	(bool<mode>3_internal): Likewise.
      	(boolc<mode>3_internal1): Likewise.
      	(boolc<mode>3_internal2): Likewise.
      	(boolcc<mode>3_internal1): Likewise.
      	(boolcc<mode>3_internal2): Likewise.
      	(eqv<mode>3_internal1): Likewise.
      	(eqv<mode>3_internal2): Likewise.
      	(one_cmpl1<mode>3_internal): Likewise.
      
      [gcc/testsuite]
      2013-07-23  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* gcc.target/powerpc/bool2.h: New file, test the code generation
      	of logical operations for power5, altivec, power7, and power8
      	systems.
      	* gcc.target/powerpc/bool2-p5.c: Likewise.
      	* gcc.target/powerpc/bool2-av.c: Likewise.
      	* gcc.target/powerpc/bool2-p7.c: Likewise.
      	* gcc.target/powerpc/bool2-p8.c: Likewise.
      	* gcc.target/powerpc/bool3.h: Likewise.
      	* gcc.target/powerpc/bool3-av.c: Likewise.
      	* gcc.target/powerpc/bool2-p7.c: Likewise.
      	* gcc.target/powerpc/bool2-p8.c: Likewise.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201187 138bc75d-0d04-0410-961f-82ee72b054a4
      91bf8773
  17. 18 Jun, 2013 1 commit
  18. 10 Jun, 2013 1 commit
    • meissner's avatar
      [gcc] · f88fbcb9
      meissner authored
      2013-06-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
      	    Pat Haugen <pthaugen@us.ibm.com>
      	    Peter Bergner <bergner@vnet.ibm.com>
      
      	* config/rs6000/vector.md (GPR move splitter): Do not split moves
      	of vectors in GPRS if they are direct moves or quad word load or
      	store moves.
      
      	* config/rs6000/rs6000-protos.h (rs6000_output_move_128bit): Add
      	declaration.
      	(direct_move_p): Likewise.
      	(quad_load_store_p): Likewise.
      
      	* config/rs6000/rs6000.c (enum rs6000_reg_type): Simplify register
      	classes into bins based on the physical register type.
      	(reg_class_to_reg_type): Likewise.
      	(IS_STD_REG_TYPE): Likewise.
      	(IS_FP_VECT_REG_TYPE): Likewise.
      	(reload_fpr_gpr): Arrays to determine what insn to use if we can
      	use direct move instructions.
      	(reload_gpr_vsx): Likewise.
      	(reload_vsx_gpr): Likewise.
      	(rs6000_init_hard_regno_mode_ok): Precalculate the register type
      	information that is a simplification of register classes.  Also
      	precalculate direct move reload helpers.
      	(direct_move_p): New function to return true if the operation can
      	be done as a direct move instruciton.
      	(quad_load_store_p): New function to return true if the operation
      	is a quad memory operation.
      	(rs6000_legitimize_address): If quad memory, only allow register
      	indirect for TImode addresses.
      	(rs6000_legitimate_address_p): Likewise.
      	(enum reload_reg_type): Delete, replace with rs6000_reg_type.
      	(rs6000_reload_register_type): Likewise.
      	(register_to_reg_type): Return register type.
      	(rs6000_secondary_reload_simple_move): New helper function for
      	secondary reload and secondary memory needed to identify anything
      	that is a simple move, and does not need reloading.
      	(rs6000_secondary_reload_direct_move): New helper function for
      	secondary reload to identify cases that can be done with several
      	instructions via the direct move instructions.
      	(rs6000_secondary_reload_move): New helper function for secondary
      	reload to identify moves between register types that can be done.
      	(rs6000_secondary_reload): Add support for quad memory operations
      	and for direct move.
      	(rs6000_secondary_memory_needed): Likewise.
      	(rs6000_debug_secondary_memory_needed): Change argument names.
      	(rs6000_output_move_128bit): New function to return the move to
      	use for 128-bit moves, including knowing about the various
      	limitations of quad memory operations.
      
      	* config/rs6000/vsx.md (vsx_mov<mode>): Add support for quad
      	memory operations.  call rs6000_output_move_128bit for the actual
      	instruciton(s) to generate.
      	(vsx_movti_64bit): Likewise.
      
      	* config/rs6000/rs6000.md (UNSPEC_P8V_FMRGOW): New unspec values.
      	(UNSPEC_P8V_MTVSRWZ): Likewise.
      	(UNSPEC_P8V_RELOAD_FROM_GPR): Likewise.
      	(UNSPEC_P8V_MTVSRD): Likewise.
      	(UNSPEC_P8V_XXPERMDI): Likewise.
      	(UNSPEC_P8V_RELOAD_FROM_VSX): Likewise.
      	(UNSPEC_FUSION_GPR): Likewise.
      	(FMOVE128_GPR): New iterator for direct move.
      	(f32_lv): New mode attribute for load/store of SFmode/SDmode
      	values.
      	(f32_sv): Likewise.
      	(f32_dm): Likewise.
      	(zero_extend<mode>di2_internal1): Add support for power8 32-bit
      	loads and direct move instructions.
      	(zero_extendsidi2_lfiwzx): Likewise.
      	(extendsidi2_lfiwax): Likewise.
      	(extendsidi2_nocell): Likewise.
      	(floatsi<mode>2_lfiwax): Likewise.
      	(lfiwax): Likewise.
      	(floatunssi<mode>2_lfiwzx): Likewise.
      	(lfiwzx): Likewise.
      	(fix_trunc<mode>_stfiwx): Likewise.
      	(fixuns_trunc<mode>_stfiwx): Likewise.
      	(mov<mode>_hardfloat, 32-bit floating point): Likewise.
      	(mov<move>_hardfloat64, 64-bit floating point): Likewise.
      	(parity<mode>2_cmpb): Set length/type attr.
      	(unnamed shift right patterns, mov<mode>_internal2): Change type attr
      	for 'mr.' to fast_compare.
      	(bpermd_<mode>): Change type attr to popcnt.
      	(p8_fmrgow_<mode>): New insns for power8 direct move support.
      	(p8_mtvsrwz_1): Likewise.
      	(p8_mtvsrwz_2): Likewise.
      	(reload_fpr_from_gpr<mode>): Likewise.
      	(p8_mtvsrd_1): Likewise.
      	(p8_mtvsrd_2): Likewise.
      	(p8_xxpermdi_<mode>): Likewise.
      	(reload_vsx_from_gpr<mode>): Likewise.
      	(reload_vsx_from_gprsf): Likewise.
      	(p8_mfvsrd_3_<mode>): LIkewise.
      	(reload_gpr_from_vsx<mode>): Likewise.
      	(reload_gpr_from_vsxsf): Likewise.
      	(p8_mfvsrd_4_disf): Likewise.
      	(multi-word GPR splits): Do not split direct moves or quad memory
      	operations.
      
      [gcc/testsuite]
      2013-06-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
      	    Pat Haugen <pthaugen@us.ibm.com>
      	    Peter Bergner <bergner@vnet.ibm.com>
      
      	* gcc.target/powerpc/direct-move-vint1.c: New tests for power8
      	direct move instructions.
      	* gcc.target/powerpc/direct-move-vint2.c: Likewise.
      	* gcc.target/powerpc/direct-move.h: Likewise.
      	* gcc.target/powerpc/direct-move-float1.c: Likewise.
      	* gcc.target/powerpc/direct-move-float2.c: Likewise.
      	* gcc.target/powerpc/direct-move-double1.c: Likewise.
      	* gcc.target/powerpc/direct-move-double2.c: Likewise.
      	* gcc.target/powerpc/direct-move-long1.c: Likewise.
      	* gcc.target/powerpc/direct-move-long2.c: Likewise.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199918 138bc75d-0d04-0410-961f-82ee72b054a4
      f88fbcb9
  19. 10 Jan, 2013 1 commit
  20. 10 Oct, 2012 1 commit
  21. 24 Jul, 2012 1 commit
    • amodra's avatar
      PR target/53914 · 885d1f6b
      amodra authored
      	PR target/54009
      	* config/rs6000/constraints.md (Y): Use mem_operand_gpr.
      	* config/rs6000/predicates.md (word_offset_memref_operand): Delete.
      	Adjust all rs6000_legitimate_offset_address_p calls.
      	* config/rs6000/rs6000-protos.h (mem_operand_gpr): Declare.
      	(rs6000_secondary_reload_gpr): Declare.
      	(rs6000_legitimate_offset_address_p): Update prototype.
      	(rs6000_offsettable_memref_p): Delete.
      	(rs6000_secondary_reload_ppc64): Delete.
      	* config/rs6000/rs6000.c (address_offset): New function.
      	(mem_operand_gpr): Likewise.
      	(rs6000_legitimate_offset_address_p): Add worst_case param.  When
      	not worst_case assume class of regs with least restrictive offsets.
      	Adjust all calls.
      	(legitimate_lo_sum_address_p): Simplify register mode tests.
      	(rs6000_legitimize_address): Likewise.  Assume best case offset
      	addressing.  Combine ELF and MACHO lo_sum code.
      	(rs6000_mode_dependent_address): Correct offset addressing limits.
      	(rs6000_offsettable_memref_p): Make static, add reg_mode param.
      	Use reg_mode to help rs6000_legitimate_offset_address_p.
      	(rs6000_secondary_reload): Use address_offset.  Handle 32-bit multi
      	gpr load/store when offset too large.
      	(rs6000_secondary_reload_gpr): Renamed rs6000_secondary_reload_ppc64.
      	(rs6000_split_multireg_move): Adjust rs6000_offsettable_memref_p calls.
      	* config/rs6000/rs6000.md (movdf_hardfloat32): Use 'Y' constraint
      	for gpr load/store.  Order alternatives as r->Y,Y->r,r->r and
      	d->m,m->d,d->d.  Correct size of gpr load/store.
      	(movdf_softfloat32): Use 'Y' constraint for gpr load/store.  Order
      	alternatives.
      	(movti_ppc64): Likewise.
      	(movdi_internal32): Likewise.  Also disparage fprs.
      	(movdi_mfpgpr, movdi_internal64): Likewise.
      	(movtf_internal): Use 'm' for fpr load/store.  Order alternatives.
      	(movtf_softfloat): Order alternatives.
      	(extenddftf2_internal): Use 'm' and 'Y' for store.
      	(movti_power, movti_string): Use 'Y' for gpr load/store.  Order.
      	(stack_protect_setdi, stack_protect_testdi): Likewise.
      	(movdf_hardfloat64_mfpgpr, movdf_hardfloat64): Order alternatives.
      	(movdf_softfloat64): Likewise.
      	(reload_<mode>_store): Adjust reload_di_store to provide
      	reload_si_store as well.
      	(reload_<mode>_load): Likewise.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@189801 138bc75d-0d04-0410-961f-82ee72b054a4
      885d1f6b
  22. 20 May, 2012 1 commit
    • amodra's avatar
      * config/rs6000/predicates.md (input_operand): Don't match · ae4dcb11
      amodra authored
      	constant pool addresses.  Remove label_ref, high and plus from
      	match_code list.  Remove redundant CONSTANT_P test.
      	(splat_input_operand): Similarly update match_code list.
      	(small_toc_ref): New predicate.
      	* config/rs6000/rs6000-protos.h (toc_relative_expr_p): Update prototype.
      	* config/rs6000/rs6000.c (tocrel_base, tocrel_offset): Make const.
      	(legitimate_constant_pool_address_p): Move TARGET_TOC test and
      	register checks to..
      	(toc_relative_expr_p): ..here.  Add "strict" param.  Match new rtl
      	generated by create_TOC_reference.
      	(rs6000_legitimize_address): Update cerate_TOC_reference call.
      	(rs6000_delegitimize_address): Handle new rtl for toc refs.
      	(rs6000_cannot_force_const_mem, rs6000_find_base_term): Likewise.
      	(use_toc_relative_ref): New function, split out from..
      	(rs6000_emit_move): ..here.  Remove redundant tests.  Update
      	create_TOC_reference calls.
      	(rs6000_legitimize_reload_address): Formatting.  Handle splitting
      	of medium/large model toc addresses.  Use use_toc_relative_ref.
      	(print_operand): Formatting, style.  Adjust for toc changes.
      	(print_operand_address): Likewise.
      	(rs6000_output_addr_const_extra): Likewise.
      	(create_TOC_reference): Put TOC_REGISTER in UNSPEC_TOCREL rather
      	than a PLUS.  Use this formulation for both high and low part
      	of -mcmodel=medium/large toc reference too.  Before reload,
      	always use the small model formulation.
      	* config/rs6000/rs6000.md (tls_gd, tls_gd_high): Similarly avoid
      	a PLUS in high part of addresses here.
      	(tls_ld, tls_ld_high, tls_got_dtprel, tls_got_dtprel_high): Likewise.
      	(tls_got_tprel, tls_got_tprel_high, largetoc_high): Likewise.
      	(largetoc_high, largetoc_low): Move earlier.  Cope when no
      	base reg available.
      	(largetoc_high_plus): New insn.
      	(movsi_internal1, movsi_internal1_single, movsf_softfloat,
      	movdi_mfpgpr, movdi_internal64): Don't handle 'R' constraint here..
      	(tocref): ..instead do so here, new insn and split.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@187699 138bc75d-0d04-0410-961f-82ee72b054a4
      ae4dcb11
  23. 10 Dec, 2011 1 commit
    • rth's avatar
      rs6000: Implement vec_perm_const for all vector ISAs · c8ad47e1
      rth authored
              * config/rs6000/altivec.md (altivec_vmrghb): Rewrite pattern as
              vec_select + vec_concat.
              (altivec_vmrghh, altivec_vmrghw, altivec_vmrghsf, altivec_vmrglb,
              altivec_vmrglh, altivec_vmrglw, altivec_vmrglsf): Likewise.
              (vec_perm_constv16qi): New.
              (vec_extract_evenv4si, vec_extract_evenv4sf, vpkuhum_nomode,
              vpkuwum_nomode, vec_extract_oddv8hi, vec_extract_oddv16qi,
              vec_interleave_high<VI>, vec_interleave_low<VI>): Remove.
              * config/rs6000/paired.md (paired_merge00): Rewrite pattern as
              vec_select + vec_concat.
              (paired_merge10, paired_merge01, paired_merge11): Likewise.
              (vec_perm_constv2sf): New.
              (vec_interleave_highv2sf, vec_interleave_lowv2sf,
              vec_extract_evenv2sf, vec_extract_oddv2sf): Remove.
              * config/rs6000/spe.md (spe_evmergehi): Rewrite pattern as
              vec_select + vec_concat.
              (spe_evmergehilo, spe_evmergelo, spe_evmergelohi): New.
              (vec_perm_constv2si): New.
              * config/rs6000/vector.md (vec_interleave_highv4sf,
              vec_interleave_lowv4sf, vec_interleave_high<VEC_64>,
              vec_interleave_low<VEC_64>): Remove.
              * config/rs6000/vsx.md (VS_double): New mode attribute.
              (UNSPEC_VSX_XXPERMDI): Remove.
              (vsx_xxpermdi_<VSX_L>_1): Rewrite pattern as vec_select + vec_concat.
              (vsx_xxmrghw_<VSX_W>, vsx_xxmrglw_<VSX_W>): Likewise.
              (vsx_xxpermdi_<VSX_L>): Change to expander.
              (vec_perm_const<VSX_D>): New.
              (vsx_mergel_<VSX_D>, vsx_mergeh_<VSX_D>): New.
              * config/rs6000/predicates.md (const_0_to_1_operand): New.
              (const_2_to_3_operand): New.
              * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): New.
              (altivec_expand_vec_perm_const): New.
              (rs6000_expand_vec_perm_const_1, rs6000_expand_vec_perm_const): New.
              (rs6000_vectorize_vec_perm_const_ok): New.
              (rs6000_do_expand_vec_perm): New.
              (rs6000_expand_extract_even, rs6000_expand_interleave): New.
              * config/rs6000/rs6000-builtin.def (VEC_MERGE*): Update rtx codes.
              * config/rs6000/rs6000-modes.def: Add double-wide vector modes.
              * config/rs6000/rs6000-protos.h: Update.
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182193 138bc75d-0d04-0410-961f-82ee72b054a4
      c8ad47e1
  24. 29 Nov, 2011 1 commit
  25. 14 Nov, 2011 1 commit
  26. 01 Nov, 2011 1 commit
    • bergner's avatar
      * config.gcc (powerpc*-*-linux*): Add powerpc*-*-linux*ppc476* variant. · fef79628
      bergner authored
      	* config/rs6000/476.h: New file.
      	* config/rs6000/476.opt: Likewise.
      	* config/rs6000/rs6000.h (TARGET_LINK_STACK): New define.
      	(SET_TARGET_LINK_STACK): Likewise.
      	(TARGET_ASM_CODE_END): Define.
      	* config/rs6000/rs6000.c (rs6000_option_override_internal): Enable
      	TARGET_LINK_STACK for -mtune=476 and -mtune=476fp.
      	(rs6000_legitimize_tls_address): Emit the link stack preserving GOT
      	code if TARGET_LINK_STACK.
      	(rs6000_emit_load_toc_table): Likewise.
      	(output_function_profiler): Likewise
      	(macho_branch_islands): Likewise
      	(machopic_output_stub): Likewise
      	(get_ppc476_thunk_name): New function.
      	(rs6000_code_end): Likewise.
      	* config/rs6000/rs6000.md (load_toc_v4_PIC_1, load_toc_v4_PIC_1b):
      	Convert to a define_expand.
      	(load_toc_v4_PIC_1_normal): New define_insn.
      	(load_toc_v4_PIC_1_476): Likewise.
      	(load_toc_v4_PIC_1b_normal): Likewise.
      	(load_toc_v4_PIC_1b_476): Likewise.
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180741 138bc75d-0d04-0410-961f-82ee72b054a4
      fef79628
  27. 01 Aug, 2011 1 commit
    • amodra's avatar
      libgcc/ · 9a4af446
      amodra authored
      	* config/rs6000/linux-unwind.h (frob_update_context <__powerpc64__>):
      	Restore for indirect call bcrtl from correct stack slot, and only
      	if cfa+40 isn't valid.
      gcc/
      	* config/rs6000/rs6000-protos.h (rs6000_save_toc_in_prologue_p): Delete.
      	* config/rs6000/rs6000.c (rs6000_save_toc_in_prologue_p): Make static.
      	(rs6000_emit_prologue): Don't prematurely return when
      	TARGET_SINGLE_PIC_BASE.  Don't emit eh_frame info in
      	save_toc_in_prologue case.
      	(rs6000_call_indirect_aix): Only disallow save_toc_in_prologue for
      	calls_alloca.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@177041 138bc75d-0d04-0410-961f-82ee72b054a4
      9a4af446
  28. 06 Jul, 2011 1 commit
  29. 20 Jun, 2011 1 commit
  30. 26 Mar, 2011 1 commit
  31. 15 Mar, 2011 1 commit
    • amodra's avatar
      PR target/48032 · a93b6189
      amodra authored
      	* config/rs6000/rs6000.c (offsettable_ok_by_alignment): Do not
      	presume symbol_refs without a symbol_ref_decl are suitably
      	aligned, nor other trees we may see here.  Handle anchor symbols.
      	(legitimate_constant_pool_address_p): Comment.  Add mode param.
      	Check cmodel=medium addresses.  Adjust all calls.
      	(rs6000_emit_move): Don't call offsettable_ok_by_alignment on
      	creating cmodel=medium optimized access to locals.
      	* config/rs6000/constraints.md (R): Pass QImode to
      	legitimate_constant_pool_address_p.
      	* config/rs6000/predicates.md (input_operand): Pass mode to
      	legitimate_constant_pool_address_p.
      	* config/rs6000/rs6000-protos.h (legitimate_constant_pool_address_p):
      	Update prototype.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@170976 138bc75d-0d04-0410-961f-82ee72b054a4
      a93b6189
  32. 07 Mar, 2011 1 commit
    • amodra's avatar
      * config/rs6000/linux.h (TARGET_ASM_FILE_END): Don't define. · 7a2d6ba2
      amodra authored
      	* config/rs6000/linux64.h (TARGET_ASM_FILE_END): Don't define.
      	* config/rs6000/sysv4.h (TARGET_ASM_FILE_END): Define.
      	* config/rs6000/rs6000-protos.h (init_cumulative_args): Add fndecl and
      	return_mode args.
      	* config/rs6000/rs6000.h (CUMULATIVE_ARGS): Add "escapes".
      	(INIT_CUMULATIVE_ARGS): Pass FNDECL, VOIDmode.
      	(INIT_CUMULATIVE_INCOMING_ARGS): Pass current_function_decl, VOIDmode.
      	(INIT_CUMULATIVE_LIBCALL_ARGS): Pass NULL_TREE, MODE.
      	* config/rs6000/rs6000.c
      	(rs6000_elf_end_indicate_exec_stack): Rename to..
      	(rs6000_elf_file_end): ..this.  Only call file_end_indicate_exec_stack
      	for POWERPC_LINUX.  Move code emitting .gnu_attribute to here, from..
      	(rs6000_file_start): ..here.
      	(rs6000_passes_float, rs6000_passes_vector, rs6000_returns_struct): New
      	file scope variables.
      	(call_ABI_of_interest): New function.
      	(init_cumulative_args): Set above vars when function return value
      	is a float, vector, or small struct.
      	(rs6000_function_arg_advance_1): Likewise for function args.
      	(rs6000_va_start): Set rs6000_passes_float if variable arg function
      	references float args.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@170734 138bc75d-0d04-0410-961f-82ee72b054a4
      7a2d6ba2
  33. 03 Feb, 2011 1 commit
  34. 22 Nov, 2010 1 commit
    • froydnj's avatar
      * target.def (conditional_register_usage): Define. · b2d7ede1
      froydnj authored
      	* reginfo.c (init_reg_sets_1): Call
      	targetm.conditional_register_usage.
      	* system.h (CONDITIONAL_REGISTER_USAGE): Poison.
      	* doc/tm.texi.in (CONDITIONAL_REGISTER_USAGE): Adjust language
      	for making it a hook.
      	* doc/tm.texi: Regenerate.
      	* config/alpha/alpha.h (CONDITIONAL_REGISTER_USAGE): Move logic...
      	* config/alpha/alpha.c (alpha_conditional_register_usage): ...here.
      	New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/arc/arc.h (CONDITIONAL_REGISTER_USAGE): Move logic...
      	* config/arc/arc.c (arc_conditional_register_usage): ...here.
      	New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/arm/arm.h (CONDITIONAL_REGISTER_USAGE): Move logic...
      	* config/arm/arm.c (arm_conditional_register_usage): ...here.
      	New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/bfin/bfin.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/bfin/bfin-protos.h (conditional_register_usage): Delete.
      	* config/bfin/bfin.c (conditional_register_usage): Move code into...
      	(bfin_conditional_register_usage): ...here.  New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/cris/cris.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/cris/cris-protos.h (cris_conditional_register_usage): Delete.
      	* config/cris/cris.c (cris_conditional_register_usage): Make static.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/fr30/fr30.h (FIXED_REGISTERS): Adjust comment.
      	* config/frv/frv.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/frv/frv-protos.h (frv_conditional_register_usage): Delete.
      	* config/frv/frv.c (frv_conditional_register_usage): Make static.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/h8300/h8300.h (CONDITIONAL_REGISTER_USAGE): Move logic...
      	* config/h8300/h8300.c (h8300_conditional_register_usage): ...here.
      	New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/i386/i386.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/i386/i386-protos.h (ix86_conditional_register_usage): Delete.
      	* config/i386/i386.c (ix86_conditional_register_usage): Make static.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/m32c/m32c.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/m32c/m32c-protos.h (m32c_conditional_register_usage): Delete.
      	* config/m32c/m32c.c (m32c_conditional_register_usage): Make static.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/m32r/m32r.h (CONDITIONAL_REGISTER_USAGE): Move logic...
      	* config/m32r/m32r.c (m32r_conditional_register_usage): ...here.
      	New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/m68hc11/m68hc11.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/m68hc11/m68hc11-protos.h (m68hc11_conditional_register_usage):
      	Delete.
      	* config/m68hc11/m68hc11.c (m68hc11_conditional_register_usage): Make
      	static.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/mep/mep.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/mep/mep-protos.h (mep_conditional_register_usage): Delete.
      	* config/mep/mep.c (mep_conditional_register_usage): Make static.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/mips/mips.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/mips/mips-protos.h (mips_conditional_register_usage): Delete.
      	* config/mips/mips.c (mips_conditional_register_usage): Make static.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/mmix/mmix.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/mmix/mmix-protos.h (mmix_conditional_register_usage): Delete.
      	* config/mmix/mmix.c (mmix_conditional_register_usage): Make static.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/mn10300/mn10300.h (CONDITIONAL_REGISTER_USAGE): Move logic...
      	* config/mn10300/mn10300.c (mn10300_conditional_register_usage):
      	...here.  New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/pa/pa32-regs.h (CONDITIONAL_REGISTER_USAGE): Move logic...
      	* config/pa/pa64-regs.h (CONDITIONAL_REGISTER_USAGE): ...with this...
      	* config/pa/pa.c (pa_conditional_register_usage): ...here.
      	New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/pdp11/pdp11.h (CONDITIONAL_REGISTER_USAGE): Move logic...
      	* config/pdp11/pdp11.c (pdp11_conditional_register_usage): ...here.
      	New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/rs6000/rs6000.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/rs6000/rs6000-protos.h (rs6000_conditional_register_usage):
      	Delete.
      	* config/rs6000/rs6000.c (rs6000_conditional_register_usage): Make
      	static.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/rx/rx.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/rx/rx-protos.h (rx_conditional_register_usage): Delete.
      	* config/rx/rx.c (rx_conditional_register_usage): Make static.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/s390/s390.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/s390/s390-protos.h (s390_conditional_register_usage): Delete.
      	* config/s390/s390.c (s390_conditional_register_usage): Make static.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/score/score.h (CONDITIONAL_REGISTER_USAGE): Move logic...
      	* config/score/score.c (score_conditional_register_usage): ...here.
      	New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/sh/sh.h (CONDITIONAL_REGISTER_USAGE): Move logic...
      	* config/sh/sh.c (sh_conditional_register_usage): ...here.
      	New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/sparc/sparc.h (CONDITIONAL_REGISTER_USAGE): Move logic...
      	* config/sparc/sparc.c (sparc_conditional_register_usage): ...here.
      	New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/spu/spu.h (CONDITIONAL_REGISTER_USAGE): Delete.
      	* config/spu/spu-protos.h (spu_conditional_register_usage): Delete.
      	* config/spu/spu.c (spu_conditional_register_usage): Make static.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      	* config/v850/v850.h (CONDITIONAL_REGISTER_USAGE): Move logic...
      	* config/v850/v850.c (v850_conditional_register_usage): ...here.
      	New function.
      	(TARGET_CONDITIONAL_REGISTER_USAGE): Define.
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@167020 138bc75d-0d04-0410-961f-82ee72b054a4
      b2d7ede1
  35. 19 Nov, 2010 1 commit
  36. 16 Nov, 2010 1 commit
    • froydnj's avatar
      * builtins.c (std_gimplify_va_arg_expr): Use · bd99ba64
      froydnj authored
      	targetm.calls.function_arg_boundary.
      	* function.c (assign_parms, locate_and_pad_parm): Likewise.
      	* calls.c (struct arg_data): Update comment.
      	* defaults.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* target.def (function_arg_boundary): Define.
      	* targhooks.h (default_function_arg_boundary): Declare.
      	* targhooks.c (default_function_arg_boundary): Define.
      	* doc/tm.texi.in (FUNCTION_ARG_PADDING): Use
      	TARGET_FUNCTION_ARG_BOUNDARY.
      	(FUNCTION_ARG_BOUNDARY): Delete.
      	(TARGET_FUNCTION_ARG_BOUNDARY): New.
      	* doc/tm.texi: Regenerate.
      	* system.h (FUNCTION_ARG_BOUNDARY): Poison.
      	* config/arc/arc.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/arc/arc.c (arc_function_arg_boundary): Define.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/arm/arm.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/arm/arm-protos.h (arm_needs_doubleword_align): Delete.
      	* config/arm/arm.c (arm_needs_doubleword_align): Make static.
      	(arm_function_arg_boundary): Define.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/frv/frv.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/frv/frv-protos.h (frv_function_arg_boundary): Delete.
      	* config/frv/frv.c (frv_function_arg_boundary): Make static.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/i386/i386.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/i386/i386-protos.h (ix86_function_arg_boundary): Delete.
      	* config/i386/i386.c (ix86_function_arg_boundary): Make static.
      	(ix86_compat_function_arg_boundary): Take and return unsigned int.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/ia64/ia64.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/ia64/ia64-protos.h (ia64_function_arg_boundary): Delete.
      	* config/ia64/ia64.c (ia64_function_arg_boundary): Make static.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/m32c/m32c.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/m32c/m32c.c (m32c_function_arg_boundary): Define.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/m32r/m32r.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/mcore/mcore.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/mcore/mcore.c (mcore_function_arg_boundary): Define.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/mips/mips.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/mips/mips-protos.h (mips_function_arg_boundary): Delete.
      	* config/mips/mips.c (mips_function_arg_boundary): Make static.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/pa/pa.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/pa/pa.c (pa_function_arg_boundary): Define.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/picochip/picochip.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/picochip/picochip-protos.h
      	(picochip_get_function_arg_boundary): Delete.
      	* config/picochip/picochip.c (picochip_get_function_arg_boundary):
      	Rename to...
      	(picochip_function_arg_boundary): ...this.  Make static.
      	(picochip_function_arg, picochip_arg_partial_bytes): Adjust.
      	(picochip_arg_advance): Adjust.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/rs6000/rs6000.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/rs6000/rs6000-protos.h (function_arg_boundary): Delete.
      	* config/rs6000/rs6000.c (function_arg_boundary): Rename to...
      	(rs6000_function_arg_boundary): ...this.  Make static.
      	(rs6000_parm_start, rs6000_gimplify_va_arg): Adjust.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/rx/rx.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/rx/rx.c (rx_function_arg_boundary): Define.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/sparc/sparc.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/sparc/sparc.c (sparc_function_arg_boundary): Define.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      	* config/xtensa/xtensa.h (FUNCTION_ARG_BOUNDARY): Delete.
      	* config/xtensa/xtensa-protos.h (function_arg_boundary): Delete.
      	* config/xtensa/xtensa.c (function_arg_boundary): Rename to...
      	(xtensa_function_arg_boundary): ...this.  Make static.
      	(TARGET_FUNCTION_ARG_BOUNDARY): Define.
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@166803 138bc75d-0d04-0410-961f-82ee72b054a4
      bd99ba64
  37. 09 Nov, 2010 1 commit
  38. 04 Nov, 2010 1 commit
    • pthaugen's avatar
      * final.c (compute_alignments): Compute/free loop info all the time. · 0683140a
      pthaugen authored
      	* config/rs6000/rs6000.h (LOOP_ALIGN): Define.
      	* config/rs6000/rs6000-protos.h (rs6000_loop_align): Declare.
      	* config/rs6000/t-rs6000 (rs6000.o): Add cfgloop.h.
      	* config/rs6000/rs6000.c (cfgloop.h): Include.
      	(can_override_loop_align): New.
      	(rs6000_option_override_internal): Set it.
      	(TARGET_ASM_LOOP_ALIGN_MAX_SKIP): Define target hook.
      	(rs6000_loop_align): New function.
      	(rs6000_loop_align_max_skip): Likewise.
      
      	* gcc.target/powerpc/loop_align.c: New.
      
      
      
      git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@166329 138bc75d-0d04-0410-961f-82ee72b054a4
      0683140a