Commit 30f499b1 authored by gerald's avatar gerald

* doc/invoke.texi (ARC Options): Use CPU instead of cpu.

	(ARM Options): Ditto.
	(i386 and x86-64 Options): Ditto.
	(RX Options): Ditto.
	(SPARC Options): Ditto.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@170528 138bc75d-0d04-0410-961f-82ee72b054a4
parent 4f0040d7
2011-02-26 Gerald Pfeifer <gerald@pfeifer.com>
* doc/invoke.texi (ARC Options): Use CPU instead of cpu.
(ARM Options): Ditto.
(i386 and x86-64 Options): Ditto.
(RX Options): Ditto.
(SPARC Options): Ditto.
2011-02-26 Tijl Coosemans <tijl@coosemans.org> 2011-02-26 Tijl Coosemans <tijl@coosemans.org>
* config.gcc (i386-*-freebsd*): Make i486 the default arch on * config.gcc (i386-*-freebsd*): Make i486 the default arch on
......
...@@ -10019,10 +10019,10 @@ Compile code for big endian mode. ...@@ -10019,10 +10019,10 @@ Compile code for big endian mode.
@item -mmangle-cpu @item -mmangle-cpu
@opindex mmangle-cpu @opindex mmangle-cpu
Prepend the name of the cpu to all public symbol names. Prepend the name of the CPU to all public symbol names.
In multiple-processor systems, there are many ARC variants with different In multiple-processor systems, there are many ARC variants with different
instruction and register set characteristics. This flag prevents code instruction and register set characteristics. This flag prevents code
compiled for one cpu to be linked with code compiled for another. compiled for one CPU to be linked with code compiled for another.
No facility exists for handling variants that are ``almost identical''. No facility exists for handling variants that are ``almost identical''.
This is an all or nothing option. This is an all or nothing option.
...@@ -10195,7 +10195,7 @@ instead of specifying the actual target processor type, and hence ...@@ -10195,7 +10195,7 @@ instead of specifying the actual target processor type, and hence
restricting which instructions can be used, it specifies that GCC should restricting which instructions can be used, it specifies that GCC should
tune the performance of the code as if the target were of the type tune the performance of the code as if the target were of the type
specified in this option, but still choosing the instructions that it specified in this option, but still choosing the instructions that it
will generate based on the cpu specified by a @option{-mcpu=} option. will generate based on the CPU specified by a @option{-mcpu=} option.
For some ARM implementations better performance can be obtained by using For some ARM implementations better performance can be obtained by using
this option. this option.
...@@ -12298,7 +12298,7 @@ Some 387 emulators do not support the @code{sin}, @code{cos} and ...@@ -12298,7 +12298,7 @@ Some 387 emulators do not support the @code{sin}, @code{cos} and
@code{sqrt} instructions for the 387. Specify this option to avoid @code{sqrt} instructions for the 387. Specify this option to avoid
generating those instructions. This option is the default on FreeBSD, generating those instructions. This option is the default on FreeBSD,
OpenBSD and NetBSD@. This option is overridden when @option{-march} OpenBSD and NetBSD@. This option is overridden when @option{-march}
indicates that the target cpu will always have an FPU and so the indicates that the target CPU will always have an FPU and so the
instruction will not need emulation. As of revision 2.6.1, these instruction will not need emulation. As of revision 2.6.1, these
instructions are not generated unless you also use the instructions are not generated unless you also use the
@option{-funsafe-math-optimizations} switch. @option{-funsafe-math-optimizations} switch.
...@@ -16245,7 +16245,7 @@ This is because the RX FPU instructions are themselves unsafe. ...@@ -16245,7 +16245,7 @@ This is because the RX FPU instructions are themselves unsafe.
@opindex -mcpu @opindex -mcpu
Selects the type of RX CPU to be targeted. Currently three types are Selects the type of RX CPU to be targeted. Currently three types are
supported, the generic @var{RX600} and @var{RX200} series hardware and supported, the generic @var{RX600} and @var{RX200} series hardware and
the specific @var{RX610} cpu. The default is @var{RX600}. the specific @var{RX610} CPU. The default is @var{RX600}.
The only difference between @var{RX600} and @var{RX610} is that the The only difference between @var{RX600} and @var{RX610} is that the
@var{RX610} does not support the @code{MVTIPL} instruction. @var{RX610} does not support the @code{MVTIPL} instruction.
...@@ -17098,7 +17098,7 @@ option @option{-mcpu=@var{cpu_type}} would. ...@@ -17098,7 +17098,7 @@ option @option{-mcpu=@var{cpu_type}} would.
The same values for @option{-mcpu=@var{cpu_type}} can be used for The same values for @option{-mcpu=@var{cpu_type}} can be used for
@option{-mtune=@var{cpu_type}}, but the only useful values are those @option{-mtune=@var{cpu_type}}, but the only useful values are those
that select a particular cpu implementation. Those are @samp{cypress}, that select a particular CPU implementation. Those are @samp{cypress},
@samp{supersparc}, @samp{hypersparc}, @samp{leon}, @samp{f930}, @samp{f934}, @samp{supersparc}, @samp{hypersparc}, @samp{leon}, @samp{f930}, @samp{f934},
@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, @samp{ultrasparc3}, @samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, @samp{ultrasparc3},
@samp{niagara}, and @samp{niagara2}. @samp{niagara}, and @samp{niagara2}.
......
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