Commit 246277a8 authored by Doug Gilbert's avatar Doug Gilbert Committed by Patrick Williams

requre 8 byte alignment on offsettable memory access for 64bit load/store

parent 79924b0d
......@@ -226,4 +226,5 @@ extern unsigned char rs6000_hard_regno_nregs[][FIRST_PSEUDO_REGISTER];
extern bool rs6000_linux_float_exceptions_rounding_supported_p (void);
extern bool mem_contiguous(rtx, rtx);
extern bool offset_8byte_aligned(rtx);
#endif /* rs6000-protos.h */
......@@ -20589,9 +20589,10 @@ rs6000_split_multireg_move (rtx dst, rtx src)
reg_op = src;
}
if(reg_op && mem_op &&
(GET_MODE (dst) == DImode && GET_MODE (src) == DImode))
(GET_MODE (dst) == DImode &&
GET_MODE (src) == DImode) &&
offset_8byte_aligned(mem_op))
{
// TODO check for alignment on memory
emit_insn (gen_rtx_SET (DImode, dst, src));
return;
}
......@@ -33446,6 +33447,26 @@ bool mem_contiguous(rtx mem1, rtx mem2)
return result;
}
// PPE42
bool offset_8byte_aligned(rtx mem)
{
// Test lvd and stvd cases.
// lvdu, stvd, lvdx, stvdx should always be aligned
int offset = 0;
int code = GET_CODE(XEXP(mem,0));
if(code == PLUS) //lvd stvd
{
if(GET_CODE(XEXP(XEXP(mem,0),0)) == REG)
{
if ( GET_CODE(XEXP(XEXP(mem,0),1)) == CONST_INT)
{
offset = INTVAL(XEXP(XEXP(mem,0),1));
}
}
}
return ((offset & 0x7) == 0);
}
struct gcc_target targetm = TARGET_INITIALIZER;
......
......@@ -10280,7 +10280,6 @@
;; Next come the multi-word integer load and store and the load and store
;; multiple insns.
;; List r->r after r->Y, otherwise reload will try to reload a
;; non-offsettable address by using r->r which won't make progress.
;; Use of fprs is disparaged slightly otherwise reload prefers to reload
......@@ -10292,8 +10291,8 @@
&& (gpc_reg_operand (operands[0], DImode)
|| gpc_reg_operand (operands[1], DImode))"
"@
stvd%U0%X0 %1, %0
lvd%U1%X1 %0, %1
stvd%U0%X0 %1, %0##ppe stvd
lvd%U1%X1 %0, %1 ##ppe lvd
# movedi_internal32 %0, %1 REPORT ME!
stfd%U0%X0 %1,%0
lfd%U1%X1 %0,%1
......@@ -10339,7 +10338,7 @@
operands[1] = GEN_INT (((value & 0xffffffff) ^ 0x80000000) - 0x80000000);
}")
;; DImode load/store splits for PPE reg-to reg
;; DImode load/store splits
(define_split
[(set (match_operand:DIFD 0 "rs6000_nonimmediate_operand" "")
(match_operand:DIFD 1 "input_operand" ""))]
......
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