From 0c6c36e8fef06605a16e6de6f38017167fcc75fc Mon Sep 17 00:00:00 2001
From: Doug Gilbert <dgilbert@us.ibm.com>
Date: Fri, 18 Mar 2016 11:41:35 -0500
Subject: [PATCH] PPE42 compiler generates invalid crnot instruction

---
 gcc/config/rs6000/rs6000.md | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 4255db4310f..abaca0c934d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -13088,12 +13088,16 @@
   DONE;
 }")
 
+  /* PPE42 does not support asm instructions to directly
+     manipulate the condition register (aka crnot, crxor etc. )
+     so don't support cstore on PPE42 */
+
 (define_expand "cstore<mode>4"
   [(use (match_operator 1 "rs6000_cbranch_operator"
          [(match_operand:GPR 2 "gpc_reg_operand" "")
           (match_operand:GPR 3 "reg_or_short_operand" "")]))
    (clobber (match_operand:SI 0 "register_operand"))]
-  ""
+  "rs6000_cpu != PROCESSOR_PPE42"
   "
 {
   /* Take care of the possibility that operands[3] might be negative but
@@ -13128,7 +13132,7 @@
          [(match_operand:FP 2 "gpc_reg_operand" "")
           (match_operand:FP 3 "gpc_reg_operand" "")]))
    (clobber (match_operand:SI 0 "register_operand"))]
-  ""
+  "rs6000_cpu != PROCESSOR_PPE42"
   "
 {
   rs6000_emit_sCOND (<MODE>mode, operands);
-- 
2.30.2