diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 4255db4310ff700b03e4246d2fffd54995e7e11d..abaca0c934d9e5df2763e1e6d9c18bda66bfa8af 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -13088,12 +13088,16 @@
   DONE;
 }")
 
+  /* PPE42 does not support asm instructions to directly
+     manipulate the condition register (aka crnot, crxor etc. )
+     so don't support cstore on PPE42 */
+
 (define_expand "cstore<mode>4"
   [(use (match_operator 1 "rs6000_cbranch_operator"
          [(match_operand:GPR 2 "gpc_reg_operand" "")
           (match_operand:GPR 3 "reg_or_short_operand" "")]))
    (clobber (match_operand:SI 0 "register_operand"))]
-  ""
+  "rs6000_cpu != PROCESSOR_PPE42"
   "
 {
   /* Take care of the possibility that operands[3] might be negative but
@@ -13128,7 +13132,7 @@
          [(match_operand:FP 2 "gpc_reg_operand" "")
           (match_operand:FP 3 "gpc_reg_operand" "")]))
    (clobber (match_operand:SI 0 "register_operand"))]
-  ""
+  "rs6000_cpu != PROCESSOR_PPE42"
   "
 {
   rs6000_emit_sCOND (<MODE>mode, operands);