Change plt stubs to have destination in r12.

(cherry picked from commit 71a39c98f8bedad54818c62ab2d567b0e2de546b)

Change plt stubs to have destination in r12.
(cherry picked from commit 71a39c98f8bedad54818c62ab2d567b0e2de546b)
2e3744e9 · Alan Modra · 9d1ae407 · 2e3744e9 · 2e3744e9 · 2e3744e9
Commit 2e3744e9 authored Oct 29, 2013 by Alan Modra
22 changed files
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
 2013-11-15  Alan Modra  <amodra@gmail.com>

 	Apply changes from mainline to 2.24
+	2013-10-30  Alan Modra  <amodra@gmail.com>
+	* elf64-ppc.c (build_plt_stub): Switch stubs to use r11 as base
+	reg and r12 as destination.
+	(ppc_build_one_stub): Likewise.
+	(ppc64_elf_build_stubs): Likewise for glink.
+
 	2013-10-30  Alan Modra  <amodra@gmail.com>
 	* reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA,
 	BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA,

--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -137,29 +137,29 @@ static bfd_vma opd_entry_value

 /* .plt call stub instructions.  The normal stub is like this, but
   sometimes the .plt entry crosses a 64k boundary and we need to
-   insert an addi to adjust r12.  */
+   insert an addi to adjust r11.  */
 #define PLT_CALL_STUB_SIZE (7*4)
-#define ADDIS_R12_R2	0x3d820000	/* addis %r12,%r2,xxx@ha     */
 #define STD_R2_40R1	0xf8410028	/* std	 %r2,40(%r1)	     */
-#define LD_R11_0R12	0xe96c0000	/* ld	 %r11,xxx+0@l(%r12)  */
-#define MTCTR_R11	0x7d6903a6	/* mtctr %r11		     */
-#define LD_R2_0R12	0xe84c0000	/* ld	 %r2,xxx+8@l(%r12)   */
-					/* ld	 %r11,xxx+16@l(%r12) */
+#define ADDIS_R11_R2	0x3d620000	/* addis %r11,%r2,xxx@ha     */
+#define LD_R12_0R11	0xe98b0000	/* ld	 %r12,xxx+0@l(%r11)  */
+#define MTCTR_R12	0x7d8903a6	/* mtctr %r12		     */
+#define LD_R2_0R11	0xe84b0000	/* ld	 %r2,xxx+8@l(%r11)   */
+#define LD_R11_0R11	0xe96b0000	/* ld	 %r11,xxx+16@l(%r11) */
 #define BCTR		0x4e800420	/* bctr			     */

-
-#define ADDIS_R12_R12	0x3d8c0000	/* addis %r12,%r12,off@ha  */
-#define ADDI_R12_R12	0x398c0000	/* addi %r12,%r12,off@l  */
+#define ADDI_R11_R11	0x396b0000	/* addi %r11,%r11,off@l  */
 #define ADDIS_R2_R2	0x3c420000	/* addis %r2,%r2,off@ha  */
 #define ADDI_R2_R2	0x38420000	/* addi  %r2,%r2,off@l   */

-#define XOR_R11_R11_R11	0x7d6b5a78	/* xor   %r11,%r11,%r11  */
-#define ADD_R12_R12_R11	0x7d8c5a14	/* add   %r12,%r12,%r11  */
+#define XOR_R2_R12_R12	0x7d826278	/* xor   %r2,%r12,%r12   */
+#define ADD_R11_R11_R2	0x7d6b1214	/* add   %r11,%r11,%r2   */
+#define XOR_R11_R12_R12	0x7d8b6278	/* xor   %r11,%r12,%r12  */
 #define ADD_R2_R2_R11	0x7c425a14	/* add   %r2,%r2,%r11    */
 #define CMPLDI_R2_0	0x28220000	/* cmpldi %r2,0          */
 #define BNECTR		0x4ca20420	/* bnectr+               */
 #define BNECTR_P4	0x4ce20420	/* bnectr+               */

+#define LD_R12_0R2	0xe9820000	/* ld	 %r12,xxx+0(%r2) */
 #define LD_R11_0R2	0xe9620000	/* ld	 %r11,xxx+0(%r2) */
 #define LD_R2_0R2	0xe8420000	/* ld	 %r2,xxx+0(%r2)  */

@@ -174,13 +174,13 @@ static bfd_vma opd_entry_value
 #define BCL_20_31	0x429f0005	/*  bcl 20,31,1f		*/
 					/* 1:				*/
 #define MFLR_R11	0x7d6802a6	/*  mflr %11			*/
-#define LD_R2_M16R11	0xe84bfff0	/*  ld %2,(0b-1b)(%11)		*/
+					/*  ld %2,(0b-1b)(%11)		*/
 #define MTLR_R12	0x7d8803a6	/*  mtlr %12			*/
-#define ADD_R12_R2_R11	0x7d825a14	/*  add %12,%2,%11		*/
-					/*  ld %11,0(%12)		*/
-					/*  ld %2,8(%12)		*/
-					/*  mtctr %11			*/
-					/*  ld %11,16(%12)		*/
+#define ADD_R11_R2_R11	0x7d625a14	/*  add %11,%2,%11		*/
+					/*  ld %12,0(%11)		*/
+					/*  ld %2,8(%11)		*/
+					/*  mtctr %12			*/
+					/*  ld %11,16(%11)		*/
 					/*  bctr			*/

 /* Pad with this.  */
@@ -3559,13 +3559,13 @@ ppc64_elf_get_synthetic_symtab (bfd *abfd,
   .
   .
   .	.foo_stub:
-   .		addis	12,2,Lfoo@toc@ha	# in practice, the call stub
-   .		addi	12,12,Lfoo@toc@l	# is slightly optimized, but
-   .		std	2,40(1)			# this is the general idea
-   .		ld	11,0(12)
-   .		ld	2,8(12)
-   .		mtctr	11
-   .		ld	11,16(12)
+   .		std	2,40(1)			# in practice, the call stub
+   .		addis	11,2,Lfoo@toc@ha	# is slightly optimized, but
+   .		addi	11,11,Lfoo@toc@l	# this is the general idea
+   .		ld	12,0(11)
+   .		ld	2,8(11)
+   .		mtctr	12
+   .		ld	11,16(11)
   .		bctr
   .
   .		.section .plt
@@ -3657,21 +3657,21 @@ must_be_dyn_reloc (struct bfd_link_info *info,
   ppc_stub_plt_branch:
   Similar to the above, but a 24 bit branch in the stub section won't
   reach its destination.
-   .	addis	%r12,%r2,xxx@toc@ha
-   .	ld	%r11,xxx@toc@l(%r12)
-   .	mtctr	%r11
+   .	addis	%r11,%r2,xxx@toc@ha
+   .	ld	%r12,xxx@toc@l(%r11)
+   .	mtctr	%r12
   .	bctr

   ppc_stub_plt_call:
   Used to call a function in a shared library.  If it so happens that
   the plt entry referenced crosses a 64k boundary, then an extra
-   "addi %r12,%r12,xxx@toc@l" will be inserted before the "mtctr".
-   .	addis	%r12,%r2,xxx@toc@ha
+   "addi %r11,%r11,xxx@toc@l" will be inserted before the "mtctr".
   .	std	%r2,40(%r1)
-   .	ld	%r11,xxx+0@toc@l(%r12)
-   .	mtctr	%r11
-   .	ld	%r2,xxx+8@toc@l(%r12)
-   .	ld	%r11,xxx+16@toc@l(%r12)
+   .	addis	%r11,%r2,xxx@toc@ha
+   .	ld	%r12,xxx+0@toc@l(%r11)
+   .	mtctr	%r12
+   .	ld	%r2,xxx+8@toc@l(%r11)
+   .	ld	%r11,xxx+16@toc@l(%r11)
   .	bctr

   ppc_stub_long_branch and ppc_stub_plt_branch may also have additional
@@ -3684,11 +3684,11 @@ must_be_dyn_reloc (struct bfd_link_info *info,

   A ppc_stub_plt_branch with an r2 offset looks like:
   .	std	%r2,40(%r1)
-   .	addis	%r12,%r2,xxx@toc@ha
-   .	ld	%r11,xxx@toc@l(%r12)
+   .	addis	%r11,%r2,xxx@toc@ha
+   .	ld	%r12,xxx@toc@l(%r11)
   .	addis	%r2,%r2,off@ha
   .	addi	%r2,%r2,off@l
-   .	mtctr	%r11
+   .	mtctr	%r12
   .	bctr

   In cases where the "addis" instruction would add zero, the "addis" is
@@ -9779,9 +9779,9 @@ ppc_type_of_stub (asection *input_sec,
   the appropriate glink entry if so.

   .	fake dep barrier	compare
-   .	ld 11,xxx(2)		ld 11,xxx(2)
-   .	mtctr 11		mtctr 11
-   .	xor 11,11,11		ld 2,xxx+8(2)
+   .	ld 12,xxx(2)		ld 12,xxx(2)
+   .	mtctr 12		mtctr 12
+   .	xor 11,12,12		ld 2,xxx+8(2)
   .	add 2,2,11		cmpldi 2,0
   .	ld 2,xxx+8(2)		bnectr+
   .	bctr			b <glink_entry>
@@ -9916,22 +9916,22 @@ build_plt_stub (struct ppc_link_hash_table *htab,
      if (ALWAYS_EMIT_R2SAVE
 	  || stub_entry->stub_type == ppc_stub_plt_call_r2save)
 	bfd_put_32 (obfd, STD_R2_40R1, p),			p += 4;
-      bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (offset), p),	p += 4;
-      bfd_put_32 (obfd, LD_R11_0R12 | PPC_LO (offset), p),	p += 4;
+      bfd_put_32 (obfd, ADDIS_R11_R2 | PPC_HA (offset), p),	p += 4;
+      bfd_put_32 (obfd, LD_R12_0R11 | PPC_LO (offset), p),	p += 4;
      if (PPC_HA (offset + 8 + 8 * plt_static_chain) != PPC_HA (offset))
 	{
-	  bfd_put_32 (obfd, ADDI_R12_R12 | PPC_LO (offset), p),	p += 4;
+	  bfd_put_32 (obfd, ADDI_R11_R11 | PPC_LO (offset), p),	p += 4;
 	  offset = 0;
 	}
-      bfd_put_32 (obfd, MTCTR_R11, p),				p += 4;
+      bfd_put_32 (obfd, MTCTR_R12, p),				p += 4;
      if (use_fake_dep)
 	{
-	  bfd_put_32 (obfd, XOR_R11_R11_R11, p),		p += 4;
-	  bfd_put_32 (obfd, ADD_R12_R12_R11, p),		p += 4;
+	  bfd_put_32 (obfd, XOR_R2_R12_R12, p),			p += 4;
+	  bfd_put_32 (obfd, ADD_R11_R11_R2, p),			p += 4;
 	}
-      bfd_put_32 (obfd, LD_R2_0R12 | PPC_LO (offset + 8), p),	p += 4;
+      bfd_put_32 (obfd, LD_R2_0R11 | PPC_LO (offset + 8), p),	p += 4;
      if (plt_static_chain)
-	bfd_put_32 (obfd, LD_R11_0R12 | PPC_LO (offset + 16), p), p += 4;
+	bfd_put_32 (obfd, LD_R11_0R11 | PPC_LO (offset + 16), p), p += 4;
    }
  else
    {
@@ -9963,16 +9963,16 @@ build_plt_stub (struct ppc_link_hash_table *htab,
      if (ALWAYS_EMIT_R2SAVE
 	  || stub_entry->stub_type == ppc_stub_plt_call_r2save)
 	bfd_put_32 (obfd, STD_R2_40R1, p),			p += 4;
-      bfd_put_32 (obfd, LD_R11_0R2 | PPC_LO (offset), p),	p += 4;
+      bfd_put_32 (obfd, LD_R12_0R2 | PPC_LO (offset), p),	p += 4;
      if (PPC_HA (offset + 8 + 8 * plt_static_chain) != PPC_HA (offset))
 	{
 	  bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (offset), p),	p += 4;
 	  offset = 0;
 	}
-      bfd_put_32 (obfd, MTCTR_R11, p),				p += 4;
+      bfd_put_32 (obfd, MTCTR_R12, p),				p += 4;
      if (use_fake_dep)
 	{
-	  bfd_put_32 (obfd, XOR_R11_R11_R11, p),		p += 4;
+	  bfd_put_32 (obfd, XOR_R11_R12_R12, p),		p += 4;
 	  bfd_put_32 (obfd, ADD_R2_R2_R11, p),			p += 4;
 	}
      if (plt_static_chain)
@@ -10321,14 +10321,14 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
 	  if (PPC_HA (off) != 0)
 	    {
 	      size = 16;
-	      bfd_put_32 (htab->stub_bfd, ADDIS_R12_R2 | PPC_HA (off), loc);
+	      bfd_put_32 (htab->stub_bfd, ADDIS_R11_R2 | PPC_HA (off), loc);
 	      loc += 4;
-	      bfd_put_32 (htab->stub_bfd, LD_R11_0R12 | PPC_LO (off), loc);
+	      bfd_put_32 (htab->stub_bfd, LD_R12_0R11 | PPC_LO (off), loc);
 	    }
 	  else
 	    {
 	      size = 12;
-	      bfd_put_32 (htab->stub_bfd, LD_R11_0R2 | PPC_LO (off), loc);
+	      bfd_put_32 (htab->stub_bfd, LD_R12_0R2 | PPC_LO (off), loc);
 	    }
 	}
      else
@@ -10347,14 +10347,14 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
 	  if (PPC_HA (off) != 0)
 	    {
 	      size += 4;
-	      bfd_put_32 (htab->stub_bfd, ADDIS_R12_R2 | PPC_HA (off), loc);
+	      bfd_put_32 (htab->stub_bfd, ADDIS_R11_R2 | PPC_HA (off), loc);
 	      loc += 4;
-	      bfd_put_32 (htab->stub_bfd, LD_R11_0R12 | PPC_LO (off), loc);
+	      bfd_put_32 (htab->stub_bfd, LD_R12_0R11 | PPC_LO (off), loc);
 	      loc += 4;
 	    }
 	  else
 	    {
-	      bfd_put_32 (htab->stub_bfd, LD_R11_0R2 | PPC_LO (off), loc);
+	      bfd_put_32 (htab->stub_bfd, LD_R12_0R2 | PPC_LO (off), loc);
 	      loc += 4;
 	    }

@@ -10367,7 +10367,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg)
 	  bfd_put_32 (htab->stub_bfd, ADDI_R2_R2 | PPC_LO (r2off), loc);
 	}
      loc += 4;
-      bfd_put_32 (htab->stub_bfd, MTCTR_R11, loc);
+      bfd_put_32 (htab->stub_bfd, MTCTR_R12, loc);
      loc += 4;
      bfd_put_32 (htab->stub_bfd, BCTR, loc);
      break;
@@ -12131,19 +12131,19 @@ ppc64_elf_build_stubs (bfd_boolean emit_stub_syms,
      p += 4;
      bfd_put_32 (htab->glink->owner, MFLR_R11, p);
      p += 4;
-      bfd_put_32 (htab->glink->owner, LD_R2_M16R11, p);
+      bfd_put_32 (htab->glink->owner, LD_R2_0R11 | (-16 & 0xfffc), p);
      p += 4;
      bfd_put_32 (htab->glink->owner, MTLR_R12, p);
      p += 4;
-      bfd_put_32 (htab->glink->owner, ADD_R12_R2_R11, p);
+      bfd_put_32 (htab->glink->owner, ADD_R11_R2_R11, p);
      p += 4;
-      bfd_put_32 (htab->glink->owner, LD_R11_0R12, p);
+      bfd_put_32 (htab->glink->owner, LD_R12_0R11, p);
      p += 4;
-      bfd_put_32 (htab->glink->owner, LD_R2_0R12 | 8, p);
+      bfd_put_32 (htab->glink->owner, LD_R2_0R11 | 8, p);
      p += 4;
-      bfd_put_32 (htab->glink->owner, MTCTR_R11, p);
+      bfd_put_32 (htab->glink->owner, MTCTR_R12, p);
      p += 4;
-      bfd_put_32 (htab->glink->owner, LD_R11_0R12 | 16, p);
+      bfd_put_32 (htab->glink->owner, LD_R11_0R11 | 16, p);
      p += 4;
      bfd_put_32 (htab->glink->owner, BCTR, p);
      p += 4;

--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
+2013-11-15  Alan Modra  <amodra@gmail.com>
+
+	Apply changes from mainline to 2.24
+	2013-10-30  Alan Modra  <amodra@gmail.com>
+	* ld-powerpc/tls.s: Add proper .opd entry for _start.
+	* ld-powerpc/tlstoc.s: Likewise.
+	* ld-powerpc/relbrlt.d: Update for changed stubs.
+	* ld-powerpc/tls.d: Update for changed stubs and _start .opd entry.
+	* ld-powerpc/tls.g: Likewise.
+	* ld-powerpc/tlsexe.d: Likewise.
+	* ld-powerpc/tlsexe.g: Likewise.
+	* ld-powerpc/tlsexe.r: Likewise.
+	* ld-powerpc/tlsexetoc.d: Likewise.
+	* ld-powerpc/tlsexetoc.g: Likewise.
+	* ld-powerpc/tlsexetoc.r: Likewise.
+	* ld-powerpc/tlsso.d: Likewise.
+	* ld-powerpc/tlsso.g: Likewise.
+	* ld-powerpc/tlsso.r: Likewise.
+	* ld-powerpc/tlstoc.d: Likewise.
+	* ld-powerpc/tlstoc.g: Likewise.
+	* ld-powerpc/tlstocso.d: Likewise.
+	* ld-powerpc/tlstocso.g: Likewise.
+	* ld-powerpc/tlstocso.r: Likewise.
+
 2013-11-07  Roland McGrath  <mcgrathr@google.com>

 	* ld-x86-64/x86-64.exp (mixed1, mixed2): Loosen error string match

--- a/ld/testsuite/ld-powerpc/relbrlt.d
+++ b/ld/testsuite/ld-powerpc/relbrlt.d
@@ -22,9 +22,9 @@ Disassembly of section \.text:
 	\.\.\.

 [0-9a-f	 ]*<.*plt_branch.*>:
-[0-9a-f	 ]*:	(e9 62 80 00|00 80 62 e9) 	ld      r11,-32768\(r2\)
+[0-9a-f	 ]*:	(e9 82 80 00|00 80 82 e9) 	ld      r12,-32768\(r2\)
 [0-9a-f	 ]*: R_PPC64_TOC16_DS	\*ABS\*\+0x157f00e8
-[0-9a-f	 ]*:	(7d 69 03 a6|a6 03 69 7d) 	mtctr   r11
+[0-9a-f	 ]*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 [0-9a-f	 ]*:	(4e 80 04 20|20 04 80 4e) 	bctr

 [0-9a-f	 ]*<.*long_branch.*>:
@@ -32,9 +32,9 @@ Disassembly of section \.text:
 [0-9a-f	 ]*: R_PPC64_REL24	\*ABS\*\+0x137e00fc

 [0-9a-f	 ]*<.*plt_branch.*>:
-[0-9a-f	 ]*:	(e9 62 80 08|08 80 62 e9) 	ld      r11,-32760\(r2\)
+[0-9a-f	 ]*:	(e9 82 80 08|08 80 82 e9) 	ld      r12,-32760\(r2\)
 [0-9a-f	 ]*: R_PPC64_TOC16_DS	\*ABS\*\+0x157f00f0
-[0-9a-f	 ]*:	(7d 69 03 a6|a6 03 69 7d) 	mtctr   r11
+[0-9a-f	 ]*:	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 [0-9a-f	 ]*:	(4e 80 04 20|20 04 80 4e) 	bctr
 	\.\.\.


--- a/ld/testsuite/ld-powerpc/tls.d
+++ b/ld/testsuite/ld-powerpc/tls.d
 #source: tls.s
 #source: tlslib.s
 #as: -a64
-#ld: 
+#ld:
 #objdump: -dr
 #target: powerpc64*-*-*

@@ -9,7 +9,7 @@

 Disassembly of section \.text:

-0+100000e8 <_start>:
+0+100000e8 <\._start>:
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(38 63 90 78|78 90 63 38) 	addi    r3,r3,-28552

--- a/ld/testsuite/ld-powerpc/tls.g
+++ b/ld/testsuite/ld-powerpc/tls.g
 #source: tls.s
 #source: tlslib.s
 #as: -a64
-#ld: 
+#ld:
 #objdump: -sj.got
 #target: powerpc64*-*-*

 .*

 Contents of section \.got:
- 100101e0 (00000000|e0810110) (100181e0|00000000) (ffffffff|1880ffff) (ffff8018|ffffffff)  .*
- 100101f0 (ffffffff|5880ffff) (ffff8058|ffffffff)                    .*
+ 100101f8 (00000000|f8810110) (100181f8|00000000) (ffffffff|1880ffff) (ffff8018|ffffffff)  .*
+ 10010208 (ffffffff|5880ffff) (ffff8058|ffffffff)                    .*
--- a/ld/testsuite/ld-powerpc/tls.s
+++ b/ld/testsuite/ld-powerpc/tls.s
@@ -19,8 +19,13 @@ ie4:	.quad 0x56789abcdef01234
 le4:	.quad 0x6789abcdef012345
 le5:	.quad 0x789abcdef0123456

-	.text
+	.section ".opd","aw",@progbits
+	.p2align 3
 _start:
+	.quad	.L_start,.TOC.@tocbase,0
+
+	.text
+.L_start:
 #extern syms
 #GD
 addi 3,2,gd@got@tlsgd		#R_PPC64_GOT_TLSGD16	gd

--- a/ld/testsuite/ld-powerpc/tlsexe.d
+++ b/ld/testsuite/ld-powerpc/tlsexe.d
@@ -14,13 +14,13 @@ Disassembly of section \.text:
 .*	(7c 60 1b 78|78 1b 60 7c) 	mr      r0,r3
 .*	(2c 2b 00 00|00 00 2b 2c) 	cmpdi   r11,0
 .*	(7c 6c 6a 14|14 6a 6c 7c) 	add     r3,r12,r13
-.*	(4d 82 00 20|20 00 82 4d) 	beqlr   
+.*	(4d 82 00 20|20 00 82 4d) 	beqlr *
 .*	(7c 03 03 78|78 03 03 7c) 	mr      r3,r0
 .*	(7d 68 02 a6|a6 02 68 7d) 	mflr    r11
 .*	(f9 61 00 20|20 00 61 f9) 	std     r11,32\(r1\)
 .*	(f8 41 00 28|28 00 41 f8) 	std     r2,40\(r1\)
-.*	(e9 62 80 48|48 80 62 e9) 	ld      r11,-32696\(r2\)
-.*	(7d 69 03 a6|a6 03 69 7d) 	mtctr   r11
+.*	(e9 82 80 48|48 80 82 e9) 	ld      r12,-32696\(r2\)
+.*	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 .*	(e8 42 80 50|50 80 42 e8) 	ld      r2,-32688\(r2\)
 .*	(4e 80 04 21|21 04 80 4e) 	bctrl
 .*	(e9 61 00 20|20 00 61 e9) 	ld      r11,32\(r1\)
@@ -28,7 +28,7 @@ Disassembly of section \.text:
 .*	(7d 68 03 a6|a6 03 68 7d) 	mtlr    r11
 .*	(4e 80 00 20|20 00 80 4e) 	blr

-.* <_start>:
+.* <._start>:
 .*	(e8 62 80 10|10 80 62 e8) 	ld      r3,-32752\(r2\)
 .*	(60 00 00 00|00 00 00 60) 	nop
 .*	(7c 63 6a 14|14 6a 63 7c) 	add     r3,r3,r13
@@ -67,22 +67,23 @@ Disassembly of section \.text:
 .*	(e9 4d 90 2a|2a 90 4d e9) 	lwa     r10,-28632\(r13\)
 .*	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
 .*	(a9 49 90 30|30 90 49 a9) 	lha     r10,-28624\(r9\)
-.*	(00 00 00 00|00 02 01 00) .*
-.*	(00 01 02 00|00 00 00 00) .*
+.*	(00 00 00 00|18 02 01 00) .*
+.*	(00 01 02 18|00 00 00 00) .*
 .* <__glink_PLTresolve>:
 .*	(7d 88 02 a6|a6 02 88 7d) 	mflr    r12
 .*	(42 9f 00 05|05 00 9f 42) 	bcl     20,4\*cr7\+so,.*
 .*	(7d 68 02 a6|a6 02 68 7d) 	mflr    r11
 .*	(e8 4b ff f0|f0 ff 4b e8) 	ld      r2,-16\(r11\)
 .*	(7d 88 03 a6|a6 03 88 7d) 	mtlr    r12
-.*	(7d 82 5a 14|14 5a 82 7d) 	add     r12,r2,r11
-.*	(e9 6c 00 00|00 00 6c e9) 	ld      r11,0\(r12\)
-.*	(e8 4c 00 08|08 00 4c e8) 	ld      r2,8\(r12\)
-.*	(7d 69 03 a6|a6 03 69 7d) 	mtctr   r11
-.*	(e9 6c 00 10|10 00 6c e9) 	ld      r11,16\(r12\)
+.*	(7d 62 5a 14|14 5a 62 7d) 	add     r11,r2,r11
+.*	(e9 8b 00 00|00 00 8b e9) 	ld      r12,0\(r11\)
+.*	(e8 4b 00 08|08 00 4b e8) 	ld      r2,8\(r11\)
+.*	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
+.*	(e9 6b 00 10|10 00 6b e9) 	ld      r11,16\(r11\)
 .*	(4e 80 04 20|20 04 80 4e) 	bctr
 .*	(60 00 00 00|00 00 00 60) 	nop
 .*	(60 00 00 00|00 00 00 60) 	nop
 .*	(60 00 00 00|00 00 00 60) 	nop
+.* <__tls_get_addr_opt@plt>:
 .*	(38 00 00 00|00 00 00 38) 	li      r0,0
 .*	(4b ff ff c4|c4 ff ff 4b) 	b       .*
--- a/ld/testsuite/ld-powerpc/tlsexe.g
+++ b/ld/testsuite/ld-powerpc/tlsexe.g
@@ -7,6 +7,6 @@
 .*

 Contents of section \.got:
-.* (00000000|20860110) (10018620|00000000) (ffffffff|1880ffff) (ffff8018|ffffffff)  .*
+.* (00000000|38860110) (10018638|00000000) (ffffffff|1880ffff) (ffff8018|ffffffff)  .*
 .* 00000000 00000000 00000000 00000000  .*
 .* 00000000 00000000 00000000 00000000  .*
--- a/ld/testsuite/ld-powerpc/tlsexe.r
+++ b/ld/testsuite/ld-powerpc/tlsexe.r
 #source: tls.s
 #source: tlslib.s
 #as: -a64
-#ld: 
+#ld:
 #readelf: -WSsrl
 #target: powerpc64*-*-*

@@ -20,6 +20,7 @@ Section Headers:
 +\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8
 +\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8
 +\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8
+ +\[[ 0-9]+\] \.opd .*
 +\[[ 0-9]+\] \.got +PROGBITS .* 0+30 08 +WA +0 +0 +8
 +\[[ 0-9]+\] \.plt +.*
 +\[[ 0-9]+\] \.shstrtab +.*
@@ -44,11 +45,11 @@ Program Headers:
 Section to Segment mapping:
 +Segment Sections\.\.\.
 +0+ +
- +01 +\.interp 
- +02 +\.interp \.hash \.dynsym \.dynstr \.rela\.dyn \.rela\.plt \.text 
- +03 +\.tdata \.dynamic \.got \.plt 
- +04 +\.dynamic 
- +05 +\.tdata \.tbss 
+ +01 +\.interp *
+ +02 +\.interp \.hash \.dynsym \.dynstr \.rela\.dyn \.rela\.plt \.text *
+ +03 +\.tdata \.dynamic \.opd \.got \.plt *
+ +04 +\.dynamic *
+ +05 +\.tdata \.tbss *

 Relocation section '\.rela\.dyn' at offset .* contains 3 entries:
 +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
@@ -62,30 +63,31 @@ Relocation section '\.rela\.plt' at offset .* contains 1 entries:

 Symbol table '\.dynsym' contains [0-9]+ entries:
 +Num: +Value +Size +Type +Bind +Vis +Ndx +Name
-.* NOTYPE +LOCAL +DEFAULT +UND 
+.* NOTYPE +LOCAL +DEFAULT +UND *
 .* TLS +GLOBAL +DEFAULT +UND gd
 .* TLS +GLOBAL +DEFAULT +UND ld
 .* TLS +GLOBAL +DEFAULT +9 ld2
-.* NOTYPE +GLOBAL +DEFAULT +12 __bss_start
+.* NOTYPE +GLOBAL +DEFAULT +13 __bss_start
 .* FUNC +GLOBAL +DEFAULT +UND __tls_get_addr_opt
-.* NOTYPE +GLOBAL +DEFAULT +11 _edata
-.* NOTYPE +GLOBAL +DEFAULT +12 _end
+.* NOTYPE +GLOBAL +DEFAULT +12 _edata
+.* NOTYPE +GLOBAL +DEFAULT +13 _end

 Symbol table '\.symtab' contains [0-9]+ entries:
 +Num: +Value +Size +Type +Bind +Vis +Ndx +Name
-.* 0+ +0 +NOTYPE +LOCAL +DEFAULT +UND 
-.* SECTION +LOCAL +DEFAULT +1 
-.* SECTION +LOCAL +DEFAULT +2 
-.* SECTION +LOCAL +DEFAULT +3 
-.* SECTION +LOCAL +DEFAULT +4 
-.* SECTION +LOCAL +DEFAULT +5 
-.* SECTION +LOCAL +DEFAULT +6 
-.* SECTION +LOCAL +DEFAULT +7 
-.* SECTION +LOCAL +DEFAULT +8 
-.* SECTION +LOCAL +DEFAULT +9 
-.* SECTION +LOCAL +DEFAULT +10 
-.* SECTION +LOCAL +DEFAULT +11 
-.* SECTION +LOCAL +DEFAULT +12 
+.* 0+ +0 +NOTYPE +LOCAL +DEFAULT +UND *
+.* SECTION +LOCAL +DEFAULT +1 *
+.* SECTION +LOCAL +DEFAULT +2 *
+.* SECTION +LOCAL +DEFAULT +3 *
+.* SECTION +LOCAL +DEFAULT +4 *
+.* SECTION +LOCAL +DEFAULT +5 *
+.* SECTION +LOCAL +DEFAULT +6 *
+.* SECTION +LOCAL +DEFAULT +7 *
+.* SECTION +LOCAL +DEFAULT +8 *
+.* SECTION +LOCAL +DEFAULT +9 *
+.* SECTION +LOCAL +DEFAULT +10 *
+.* SECTION +LOCAL +DEFAULT +11 *
+.* SECTION +LOCAL +DEFAULT +12 *
+.* SECTION +LOCAL +DEFAULT +13 *
 .* FILE +LOCAL +DEFAULT +ABS .*
 .* TLS +LOCAL +DEFAULT +8 gd4
 .* TLS +LOCAL +DEFAULT +8 ld4
@@ -104,12 +106,12 @@ Symbol table '\.symtab' contains [0-9]+ entries:
 .* GLOBAL +DEFAULT +9 ld0
 .* GLOBAL +DEFAULT +9 le1
 .* GLOBAL +DEFAULT +UND ld
-.* NOTYPE +GLOBAL +DEFAULT +7 _start
+.* FUNC +GLOBAL +DEFAULT +11 _start
 .* TLS +GLOBAL +DEFAULT +9 ld2
 .* TLS +GLOBAL +DEFAULT +9 ld1
-.* NOTYPE +GLOBAL +DEFAULT +12 __bss_start
+.* NOTYPE +GLOBAL +DEFAULT +13 __bss_start
 .* FUNC +GLOBAL +DEFAULT +UND __tls_get_addr_opt
-.* NOTYPE +GLOBAL +DEFAULT +11 _edata
-.* NOTYPE +GLOBAL +DEFAULT +12 _end
+.* NOTYPE +GLOBAL +DEFAULT +12 _edata
+.* NOTYPE +GLOBAL +DEFAULT +13 _end
 .* TLS +GLOBAL +DEFAULT +9 gd0
 .* TLS +GLOBAL +DEFAULT +9 ie0
--- a/ld/testsuite/ld-powerpc/tlsexetoc.d
+++ b/ld/testsuite/ld-powerpc/tlsexetoc.d
@@ -14,13 +14,13 @@ Disassembly of section \.text:
 .*	(7c 60 1b 78|78 1b 60 7c) 	mr      r0,r3
 .*	(2c 2b 00 00|00 00 2b 2c) 	cmpdi   r11,0
 .*	(7c 6c 6a 14|14 6a 6c 7c) 	add     r3,r12,r13
-.*	(4d 82 00 20|20 00 82 4d) 	beqlr   
+.*	(4d 82 00 20|20 00 82 4d) 	beqlr *
 .*	(7c 03 03 78|78 03 03 7c) 	mr      r3,r0
 .*	(7d 68 02 a6|a6 02 68 7d) 	mflr    r11
 .*	(f9 61 00 20|20 00 61 f9) 	std     r11,32\(r1\)
 .*	(f8 41 00 28|28 00 41 f8) 	std     r2,40\(r1\)
-.*	(e9 62 80 70|70 80 62 e9) 	ld      r11,-32656\(r2\)
-.*	(7d 69 03 a6|a6 03 69 7d) 	mtctr   r11
+.*	(e9 82 80 70|70 80 82 e9) 	ld      r12,-32656\(r2\)
+.*	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
 .*	(e8 42 80 78|78 80 42 e8) 	ld      r2,-32648\(r2\)
 .*	(4e 80 04 21|21 04 80 4e) 	bctrl
 .*	(e9 61 00 20|20 00 61 e9) 	ld      r11,32\(r1\)
@@ -28,7 +28,7 @@ Disassembly of section \.text:
 .*	(7d 68 03 a6|a6 03 68 7d) 	mtlr    r11
 .*	(4e 80 00 20|20 00 80 4e) 	blr

-.* <_start>:
+.* <\._start>:
 .*	(38 62 80 08|08 80 62 38) 	addi    r3,r2,-32760
 .*	(4b ff ff b5|b5 ff ff 4b) 	bl      .*
 .*	(60 00 00 00|00 00 00 60) 	nop
@@ -51,22 +51,23 @@ Disassembly of section \.text:
 .*	(89 4d 90 60|60 90 4d 89) 	lbz     r10,-28576\(r13\)
 .*	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
 .*	(99 49 90 68|68 90 49 99) 	stb     r10,-28568\(r9\)
-.*	(00 00 00 00|28 02 01 00) .*
-.*	(00 01 02 28|00 00 00 00) .*
+.*	(00 00 00 00|40 02 01 00) .*
+.*	(00 01 02 40|00 00 00 00) .*
 .* <__glink_PLTresolve>:
 .*	(7d 88 02 a6|a6 02 88 7d) 	mflr    r12
 .*	(42 9f 00 05|05 00 9f 42) 	bcl     20,4\*cr7\+so,.*
 .*	(7d 68 02 a6|a6 02 68 7d) 	mflr    r11
 .*	(e8 4b ff f0|f0 ff 4b e8) 	ld      r2,-16\(r11\)
 .*	(7d 88 03 a6|a6 03 88 7d) 	mtlr    r12
-.*	(7d 82 5a 14|14 5a 82 7d) 	add     r12,r2,r11
-.*	(e9 6c 00 00|00 00 6c e9) 	ld      r11,0\(r12\)
-.*	(e8 4c 00 08|08 00 4c e8) 	ld      r2,8\(r12\)
-.*	(7d 69 03 a6|a6 03 69 7d) 	mtctr   r11
-.*	(e9 6c 00 10|10 00 6c e9) 	ld      r11,16\(r12\)
+.*	(7d 62 5a 14|14 5a 62 7d) 	add     r11,r2,r11
+.*	(e9 8b 00 00|00 00 8b e9) 	ld      r12,0\(r11\)
+.*	(e8 4b 00 08|08 00 4b e8) 	ld      r2,8\(r11\)
+.*	(7d 89 03 a6|a6 03 89 7d) 	mtctr   r12
+.*	(e9 6b 00 10|10 00 6b e9) 	ld      r11,16\(r11\)
 .*	(4e 80 04 20|20 04 80 4e) 	bctr
 .*	(60 00 00 00|00 00 00 60) 	nop
 .*	(60 00 00 00|00 00 00 60) 	nop
 .*	(60 00 00 00|00 00 00 60) 	nop
+.* <__tls_get_addr_opt@plt>:
 .*	(38 00 00 00|00 00 00 38) 	li      r0,0
 .*	(4b ff ff c4|c4 ff ff 4b) 	b       .*
--- a/ld/testsuite/ld-powerpc/tlsexetoc.g
+++ b/ld/testsuite/ld-powerpc/tlsexetoc.g
@@ -7,7 +7,7 @@
 .*

 Contents of section \.got:
-.* (00000000|c0850110) (100185c0|00000000) 00000000 00000000  .*
+.* (00000000|d8850110) (100185d8|00000000) 00000000 00000000  .*
 .* 00000000 00000000 00000000 00000000  .*
 .* 00000000 00000000 (00000000|01000000) (00000001|00000000)  .*
 .* 00000000 00000000 (00000000|01000000) (00000001|00000000)  .*

--- a/ld/testsuite/ld-powerpc/tlsexetoc.r
+++ b/ld/testsuite/ld-powerpc/tlsexetoc.r
 #source: tlslib.s
 #source: tlstoc.s
 #as: -a64
-#ld: 
+#ld:
 #readelf: -WSsrl
 #target: powerpc64*-*-*

@@ -20,6 +20,7 @@ Section Headers:
 +\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8
 +\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8
 +\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8
+ +\[[ 0-9]+\] \.opd .*
 +\[[ 0-9]+\] \.got +PROGBITS .* 0+58 08 +WA +0 +0 +8
 +\[[ 0-9]+\] \.plt +.*
 +\[[ 0-9]+\] \.shstrtab +.*
@@ -44,11 +45,11 @@ Program Headers:
 Section to Segment mapping:
 +Segment Sections\.\.\.
 +0+ +
- +01 +\.interp 
- +02 +\.interp \.hash \.dynsym \.dynstr \.rela\.dyn \.rela\.plt \.text 
- +03 +\.tdata \.dynamic \.got \.plt 
- +04 +\.dynamic 
- +05 +\.tdata \.tbss 
+ +01 +\.interp *
+ +02 +\.interp \.hash \.dynsym \.dynstr \.rela\.dyn \.rela\.plt \.text *
+ +03 +\.tdata \.dynamic \.opd \.got \.plt *
+ +04 +\.dynamic *
+ +05 +\.tdata \.tbss *

 Relocation section '\.rela\.dyn' at offset .* contains 3 entries:
 +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
@@ -62,29 +63,30 @@ Relocation section '\.rela\.plt' at offset .* contains 1 entries:

 Symbol table '\.dynsym' contains [0-9]+ entries:
 +Num: +Value +Size +Type +Bind +Vis +Ndx +Name
-.* NOTYPE +LOCAL +DEFAULT +UND 
+.* NOTYPE +LOCAL +DEFAULT +UND *
 .* TLS +GLOBAL +DEFAULT +UND gd
 .* TLS +GLOBAL +DEFAULT +UND ld
-.* NOTYPE +GLOBAL +DEFAULT +12 __bss_start
+.* NOTYPE +GLOBAL +DEFAULT +13 __bss_start
 .* FUNC +GLOBAL +DEFAULT +UND __tls_get_addr_opt
-.* NOTYPE +GLOBAL +DEFAULT +11 _edata
-.* NOTYPE +GLOBAL +DEFAULT +12 _end
+.* NOTYPE +GLOBAL +DEFAULT +12 _edata
+.* NOTYPE +GLOBAL +DEFAULT +13 _end

 Symbol table '\.symtab' contains [0-9]+ entries:
 +Num: +Value +Size +Type +Bind +Vis +Ndx +Name
-.* NOTYPE +LOCAL +DEFAULT +UND 
-.* SECTION +LOCAL +DEFAULT +1 
-.* SECTION +LOCAL +DEFAULT +2 
-.* SECTION +LOCAL +DEFAULT +3 
-.* SECTION +LOCAL +DEFAULT +4 
-.* SECTION +LOCAL +DEFAULT +5 
-.* SECTION +LOCAL +DEFAULT +6 
-.* SECTION +LOCAL +DEFAULT +7 
-.* SECTION +LOCAL +DEFAULT +8 
-.* SECTION +LOCAL +DEFAULT +9 
-.* SECTION +LOCAL +DEFAULT +10 
-.* SECTION +LOCAL +DEFAULT +11 
-.* SECTION +LOCAL +DEFAULT +12 
+.* NOTYPE +LOCAL +DEFAULT +UND *
+.* SECTION +LOCAL +DEFAULT +1 *
+.* SECTION +LOCAL +DEFAULT +2 *
+.* SECTION +LOCAL +DEFAULT +3 *