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* config/stormy16/stormy16.md (CARRY_REG): New constant. 

  Replace uses of the "y" register class with direct references to
  the CARRY_REG register.
  * config/stormy16/stormy16.c: Replace clobbers of a BImode scratch
  register with clobbers of the carry register.
  (xstormy16_secondary_reload_class): Do not return CARRY_REGS.
  (xstormy16_split_cbranch): Remove redundant carry parameter.
  (xstormy16_expand_arith): Likewise.
  * config/stormy16/stormy16.h (enum reg_class): Remove CARRY_REGS.
  (IRA_COVER_CLASSES, REG_CLASS_NAMES, REG_CLASS_CONTENTS,
  REGNO_REG_CLASS, REG_CLASS_FROM_LETTER): Likewise.
  (CARRY_REGNUM): Define.
  * config/stormy16/stormy16-protos.h (xstormy16_split_cbranch):
  Update prototype.
  (xstormy16_expand_arith): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@142309 138bc75d-0d04-0410-961f-82ee72b054a4
parent 89ce0d40
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gcc/ChangeLog
View file @ 247d6784
2008-12-01 Nick Clifton <nickc@redhat.com>
* config/stormy16/stormy16.md (CARRY_REG): New constant.
Replace uses of the "y" register class with direct references to
the CARRY_REG register.
* config/stormy16/stormy16.c: Replace clobbers of a BImode scratch
register with clobbers of the carry register.
(xstormy16_secondary_reload_class): Do not return CARRY_REGS.
(xstormy16_split_cbranch): Remove redundant carry parameter.
(xstormy16_expand_arith): Likewise.
* config/stormy16/stormy16.h (enum reg_class): Remove CARRY_REGS.
(IRA_COVER_CLASSES, REG_CLASS_NAMES, REG_CLASS_CONTENTS,
REGNO_REG_CLASS, REG_CLASS_FROM_LETTER): Likewise.
(CARRY_REGNUM): Define.
* config/stormy16/stormy16-protos.h (xstormy16_split_cbranch):
Update prototype.
(xstormy16_expand_arith): Likewise.
2008-12-01 Chen Liqin <liqin.chen@sunplusct.com> 2008-12-01 Chen Liqin <liqin.chen@sunplusct.com>
   
* config/score/score.h (IRA_COVER_CLASSES): Define. * config/score/score.h (IRA_COVER_CLASSES): Define.
gcc/config/stormy16/stormy16-protos.h
View file @ 247d6784
...@@ -64,7 +64,7 @@ extern void xstormy16_expand_andqi3 (rtx *); ...@@ -64,7 +64,7 @@ extern void xstormy16_expand_andqi3 (rtx *);
#endif #endif
#if defined (HAVE_MACHINE_MODES) && defined (RTX_CODE) #if defined (HAVE_MACHINE_MODES) && defined (RTX_CODE)
extern void xstormy16_split_cbranch (enum machine_mode, rtx, rtx, rtx, rtx); extern void xstormy16_split_cbranch (enum machine_mode, rtx, rtx, rtx);
extern int short_memory_operand (rtx, enum machine_mode); extern int short_memory_operand (rtx, enum machine_mode);
extern int nonimmediate_nonstack_operand (rtx, enum machine_mode); extern int nonimmediate_nonstack_operand (rtx, enum machine_mode);
extern enum reg_class xstormy16_secondary_reload_class extern enum reg_class xstormy16_secondary_reload_class
...@@ -74,7 +74,7 @@ extern int xstormy16_legitimate_address_p (enum machine_mode, rtx, int); ...@@ -74,7 +74,7 @@ extern int xstormy16_legitimate_address_p (enum machine_mode, rtx, int);
extern void xstormy16_split_move (enum machine_mode, rtx, rtx); extern void xstormy16_split_move (enum machine_mode, rtx, rtx);
extern void xstormy16_expand_move (enum machine_mode, rtx, rtx); extern void xstormy16_expand_move (enum machine_mode, rtx, rtx);
extern void xstormy16_expand_arith (enum machine_mode, enum rtx_code, extern void xstormy16_expand_arith (enum machine_mode, enum rtx_code,
rtx, rtx, rtx, rtx); rtx, rtx, rtx);
extern const char * xstormy16_output_shift (enum machine_mode, enum rtx_code, extern const char * xstormy16_output_shift (enum machine_mode, enum rtx_code,
rtx, rtx, rtx); rtx, rtx, rtx);
extern int xstormy16_below100_symbol (rtx, enum machine_mode); extern int xstormy16_below100_symbol (rtx, enum machine_mode);
......
gcc/config/stormy16/stormy16.c
View file @ 247d6784
...@@ -214,7 +214,7 @@ xstormy16_emit_cbranch (enum rtx_code code, rtx loc) ...@@ -214,7 +214,7 @@ xstormy16_emit_cbranch (enum rtx_code code, rtx loc)
gen_rtx_IF_THEN_ELSE (VOIDmode, condition_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, condition_rtx,
loc_ref, pc_rtx)); loc_ref, pc_rtx));
cy_clobber = gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (BImode)); cy_clobber = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (BImode, 16));
if (mode == HImode) if (mode == HImode)
vec = gen_rtvec (2, branch, cy_clobber); vec = gen_rtvec (2, branch, cy_clobber);
...@@ -240,7 +240,7 @@ xstormy16_emit_cbranch (enum rtx_code code, rtx loc) ...@@ -240,7 +240,7 @@ xstormy16_emit_cbranch (enum rtx_code code, rtx loc)
void void
xstormy16_split_cbranch (enum machine_mode mode, rtx label, rtx comparison, xstormy16_split_cbranch (enum machine_mode mode, rtx label, rtx comparison,
rtx dest, rtx carry) rtx dest)
{ {
rtx op0 = XEXP (comparison, 0); rtx op0 = XEXP (comparison, 0);
rtx op1 = XEXP (comparison, 1); rtx op1 = XEXP (comparison, 1);
...@@ -248,7 +248,7 @@ xstormy16_split_cbranch (enum machine_mode mode, rtx label, rtx comparison, ...@@ -248,7 +248,7 @@ xstormy16_split_cbranch (enum machine_mode mode, rtx label, rtx comparison,
rtx compare; rtx compare;
start_sequence (); start_sequence ();
xstormy16_expand_arith (mode, COMPARE, dest, op0, op1, carry); xstormy16_expand_arith (mode, COMPARE, dest, op0, op1);
seq = get_insns (); seq = get_insns ();
end_sequence (); end_sequence ();
...@@ -474,11 +474,6 @@ xstormy16_secondary_reload_class (enum reg_class rclass, ...@@ -474,11 +474,6 @@ xstormy16_secondary_reload_class (enum reg_class rclass,
&& ! reg_class_subset_p (rclass, EIGHT_REGS)) && ! reg_class_subset_p (rclass, EIGHT_REGS))
return EIGHT_REGS; return EIGHT_REGS;
/* When reloading a PLUS, the carry register will be required
unless the inc or dec instructions can be used. */
if (xstormy16_carry_plus_operand (x, mode))
return CARRY_REGS;
return NO_REGS; return NO_REGS;
} }
...@@ -978,7 +973,7 @@ struct xstormy16_stack_layout ...@@ -978,7 +973,7 @@ struct xstormy16_stack_layout
#define REG_NEEDS_SAVE(REGNUM, IFUN) \ #define REG_NEEDS_SAVE(REGNUM, IFUN) \
((df_regs_ever_live_p (REGNUM) && ! call_used_regs[REGNUM]) \ ((df_regs_ever_live_p (REGNUM) && ! call_used_regs[REGNUM]) \
|| (IFUN && ! fixed_regs[REGNUM] && call_used_regs[REGNUM] \ || (IFUN && ! fixed_regs[REGNUM] && call_used_regs[REGNUM] \
&& (REGNO_REG_CLASS (REGNUM) != CARRY_REGS) \ && (REGNUM != CARRY_REGNUM) \
&& (df_regs_ever_live_p (REGNUM) || ! current_function_is_leaf))) && (df_regs_ever_live_p (REGNUM) || ! current_function_is_leaf)))
/* Compute the stack layout. */ /* Compute the stack layout. */
...@@ -1967,13 +1962,12 @@ xstormy16_expand_call (rtx retval, rtx dest, rtx counter) ...@@ -1967,13 +1962,12 @@ xstormy16_expand_call (rtx retval, rtx dest, rtx counter)
(set DEST (CODE:MODE SRC0 SRC1)) (set DEST (CODE:MODE SRC0 SRC1))
using CARRY as a temporary. When CODE is COMPARE, a branch When CODE is COMPARE, a branch template is generated
template is generated (this saves duplicating code in (this saves duplicating code in xstormy16_split_cbranch). */
xstormy16_split_cbranch). */
void void
xstormy16_expand_arith (enum machine_mode mode, enum rtx_code code, xstormy16_expand_arith (enum machine_mode mode, enum rtx_code code,
rtx dest, rtx src0, rtx src1, rtx carry) rtx dest, rtx src0, rtx src1)
{ {
int num_words = GET_MODE_BITSIZE (mode) / BITS_PER_WORD; int num_words = GET_MODE_BITSIZE (mode) / BITS_PER_WORD;
int i; int i;
...@@ -2000,9 +1994,9 @@ xstormy16_expand_arith (enum machine_mode mode, enum rtx_code code, ...@@ -2000,9 +1994,9 @@ xstormy16_expand_arith (enum machine_mode mode, enum rtx_code code,
continue; continue;
if (firstloop) if (firstloop)
insn = gen_addchi4 (w_dest, w_src0, w_src1, carry); insn = gen_addchi4 (w_dest, w_src0, w_src1);
else else
insn = gen_addchi5 (w_dest, w_src0, w_src1, carry, carry); insn = gen_addchi5 (w_dest, w_src0, w_src1);
break; break;
case NEG: case NEG:
...@@ -2013,10 +2007,10 @@ xstormy16_expand_arith (enum machine_mode mode, enum rtx_code code, ...@@ -2013,10 +2007,10 @@ xstormy16_expand_arith (enum machine_mode mode, enum rtx_code code,
rtx branch, sub, clobber, sub_1; rtx branch, sub, clobber, sub_1;
sub_1 = gen_rtx_MINUS (HImode, w_src0, sub_1 = gen_rtx_MINUS (HImode, w_src0,
gen_rtx_ZERO_EXTEND (HImode, carry)); gen_rtx_ZERO_EXTEND (HImode, gen_rtx_REG (BImode, 16)));
sub = gen_rtx_SET (VOIDmode, w_dest, sub = gen_rtx_SET (VOIDmode, w_dest,
gen_rtx_MINUS (HImode, sub_1, w_src1)); gen_rtx_MINUS (HImode, sub_1, w_src1));
clobber = gen_rtx_CLOBBER (VOIDmode, carry); clobber = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (BImode, 16));
branch = gen_rtx_SET (VOIDmode, pc_rtx, branch = gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_IF_THEN_ELSE (VOIDmode,
gen_rtx_EQ (HImode, gen_rtx_EQ (HImode,
...@@ -2032,9 +2026,9 @@ xstormy16_expand_arith (enum machine_mode mode, enum rtx_code code, ...@@ -2032,9 +2026,9 @@ xstormy16_expand_arith (enum machine_mode mode, enum rtx_code code,
&& GET_CODE (w_src1) == CONST_INT && INTVAL (w_src1) == 0) && GET_CODE (w_src1) == CONST_INT && INTVAL (w_src1) == 0)
continue; continue;
else if (firstloop) else if (firstloop)
insn = gen_subchi4 (w_dest, w_src0, w_src1, carry); insn = gen_subchi4 (w_dest, w_src0, w_src1);
else else
insn = gen_subchi5 (w_dest, w_src0, w_src1, carry, carry); insn = gen_subchi5 (w_dest, w_src0, w_src1);
break; break;
case IOR: case IOR:
......
gcc/config/stormy16/stormy16.h
View file @ 247d6784
...@@ -191,7 +191,6 @@ enum reg_class ...@@ -191,7 +191,6 @@ enum reg_class
R8_REGS, R8_REGS,
ICALL_REGS, ICALL_REGS,
GENERAL_REGS, GENERAL_REGS,
CARRY_REGS,
ALL_REGS, ALL_REGS,
LIM_REG_CLASSES LIM_REG_CLASSES
}; };
...@@ -200,7 +199,7 @@ enum reg_class ...@@ -200,7 +199,7 @@ enum reg_class
#define IRA_COVER_CLASSES \ #define IRA_COVER_CLASSES \
{ \ { \
GENERAL_REGS, CARRY_REGS, LIM_REG_CLASSES \ GENERAL_REGS, LIM_REG_CLASSES \
} }
#define REG_CLASS_NAMES \ #define REG_CLASS_NAMES \
...@@ -214,7 +213,6 @@ enum reg_class ...@@ -214,7 +213,6 @@ enum reg_class
"R8_REGS", \ "R8_REGS", \
"ICALL_REGS", \ "ICALL_REGS", \
"GENERAL_REGS", \ "GENERAL_REGS", \
"CARRY_REGS", \
"ALL_REGS" \ "ALL_REGS" \
} }
...@@ -229,17 +227,15 @@ enum reg_class ...@@ -229,17 +227,15 @@ enum reg_class
{ 0x00100 }, \ { 0x00100 }, \
{ 0x00300 }, \ { 0x00300 }, \
{ 0x6FFFF }, \ { 0x6FFFF }, \
{ 0x10000 }, \
{ (1 << FIRST_PSEUDO_REGISTER) - 1 } \ { (1 << FIRST_PSEUDO_REGISTER) - 1 } \
} }
#define REGNO_REG_CLASS(REGNO) \ #define REGNO_REG_CLASS(REGNO) \
((REGNO) == 0 ? R0_REGS \ ( (REGNO) == 0 ? R0_REGS \
: (REGNO) == 1 ? R1_REGS \ : (REGNO) == 1 ? R1_REGS \
: (REGNO) == 2 ? R2_REGS \ : (REGNO) == 2 ? R2_REGS \
: (REGNO) < 8 ? EIGHT_REGS \ : (REGNO) < 8 ? EIGHT_REGS \
: (REGNO) == 8 ? R8_REGS \ : (REGNO) == 8 ? R8_REGS \
: (REGNO) == 16 ? CARRY_REGS \
: (REGNO) <= 18 ? GENERAL_REGS \ : (REGNO) <= 18 ? GENERAL_REGS \
: ALL_REGS) : ALL_REGS)
...@@ -264,7 +260,6 @@ enum reg_class ...@@ -264,7 +260,6 @@ enum reg_class
: (CHAR) == 'd' ? R8_REGS \ : (CHAR) == 'd' ? R8_REGS \
: (CHAR) == 'e' ? EIGHT_REGS \ : (CHAR) == 'e' ? EIGHT_REGS \
: (CHAR) == 't' ? TWO_REGS \ : (CHAR) == 't' ? TWO_REGS \
: (CHAR) == 'y' ? CARRY_REGS \
: (CHAR) == 'z' ? ICALL_REGS \ : (CHAR) == 'z' ? ICALL_REGS \
: NO_REGS) : NO_REGS)
...@@ -362,16 +357,13 @@ enum reg_class ...@@ -362,16 +357,13 @@ enum reg_class
/* Register That Address the Stack Frame. */ /* Register That Address the Stack Frame. */
#define STATIC_CHAIN_REGNUM 1
#define HARD_FRAME_POINTER_REGNUM 13
#define STACK_POINTER_REGNUM 15 #define STACK_POINTER_REGNUM 15
#define CARRY_REGNUM 16
#define FRAME_POINTER_REGNUM 17 #define FRAME_POINTER_REGNUM 17
#define HARD_FRAME_POINTER_REGNUM 13
#define ARG_POINTER_REGNUM 18 #define ARG_POINTER_REGNUM 18
#define STATIC_CHAIN_REGNUM 1
/* Eliminating the Frame Pointer and the Arg Pointer */ /* Eliminating the Frame Pointer and the Arg Pointer */
......
gcc/config/stormy16/stormy16.md
View file @ 247d6784
...@@ -28,7 +28,6 @@ ...@@ -28,7 +28,6 @@
;; d $8 ;; d $8
;; e $0..$7 ;; e $0..$7
;; t $0..$1 ;; t $0..$1
;; y Carry
;; z $8..$9 ;; z $8..$9
;; I 0..3 ;; I 0..3
;; J 2**N mask ;; J 2**N mask
...@@ -45,6 +44,13 @@ ...@@ -45,6 +44,13 @@
;; U -inf..1 or 16..inf ;; U -inf..1 or 16..inf
;; Z 0 ;; Z 0
(define_constants
[
(CARRY_REG 16)
]
)
;; :::::::::::::::::::: ;; ::::::::::::::::::::
;; :: ;; ::
...@@ -313,7 +319,7 @@ ...@@ -313,7 +319,7 @@
[(set (match_operand:HI 0 "register_operand" "=r,r,r,T,T,r,r,r") [(set (match_operand:HI 0 "register_operand" "=r,r,r,T,T,r,r,r")
(plus:HI (match_operand:HI 1 "register_operand" "%0,0,0,0,0,0,0,0") (plus:HI (match_operand:HI 1 "register_operand" "%0,0,0,0,0,0,0,0")
(match_operand:HI 2 "xs_hi_nonmemory_operand" "O,P,Z,L,M,Ir,N,i"))) (match_operand:HI 2 "xs_hi_nonmemory_operand" "O,P,Z,L,M,Ir,N,i")))
(clobber (match_scratch:BI 3 "=X,X,X,y,y,y,y,y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"@ "@
inc %0,%o2 inc %0,%o2
...@@ -326,27 +332,27 @@ ...@@ -326,27 +332,27 @@
add %0,%2" add %0,%2"
[(set_attr "length" "2,2,0,2,2,2,2,4")]) [(set_attr "length" "2,2,0,2,2,2,2,4")])
; Reload can generate addition operations. The SECONDARY_RELOAD_CLASS ;; ; Reload can generate addition operations. The SECONDARY_RELOAD_CLASS
; macro causes it to allocate the carry register; this pattern ;; ; macro causes it to allocate the carry register; this pattern
; shows it how to place the register in RTL to make the addition work. ;; ; shows it how to place the register in RTL to make the addition work.
(define_expand "reload_inhi" ;; (define_expand "reload_inhi"
[(parallel [(set (match_operand:HI 0 "register_operand" "=r") ;; [(parallel [(set (match_operand:HI 0 "register_operand" "=r")
(match_operand:HI 1 "xstormy16_carry_plus_operand" "")) ;; (match_operand:HI 1 "xstormy16_carry_plus_operand" ""))
(clobber (match_operand:BI 2 "" "=&y"))])] ;; (clobber (reg:BI CARRY_REG))])]
"" ;; ""
"if (! rtx_equal_p (operands[0], XEXP (operands[1], 0))) ;; "if (! rtx_equal_p (operands[0], XEXP (operands[1], 0)))
{ ;; {
emit_insn (gen_rtx_SET (VOIDmode, operands[0], XEXP (operands[1], 0))); ;; emit_insn (gen_rtx_SET (VOIDmode, operands[0], XEXP (operands[1], 0)));
operands[1] = gen_rtx_PLUS (GET_MODE (operands[1]), operands[0], ;; operands[1] = gen_rtx_PLUS (GET_MODE (operands[1]), operands[0],
XEXP (operands[1], 1)); ;; XEXP (operands[1], 1));
} ;; }
") ;; ")
(define_insn "addchi4" (define_insn "addchi4"
[(set (match_operand:HI 0 "register_operand" "=T,r,r") [(set (match_operand:HI 0 "register_operand" "=T,r,r")
(plus:HI (match_operand:HI 1 "register_operand" "%0,0,0") (plus:HI (match_operand:HI 1 "register_operand" "%0,0,0")
(match_operand:HI 2 "xs_hi_nonmemory_operand" "L,Ir,i"))) (match_operand:HI 2 "xs_hi_nonmemory_operand" "L,Ir,i")))
(set (match_operand:BI 3 "register_operand" "=y,y,y") (set (reg:BI CARRY_REG)
(truncate:BI (lshiftrt:SI (plus:SI (zero_extend:SI (match_dup 1)) (truncate:BI (lshiftrt:SI (plus:SI (zero_extend:SI (match_dup 1))
(zero_extend:SI (match_dup 2))) (zero_extend:SI (match_dup 2)))
(const_int 16))))] (const_int 16))))]
...@@ -360,14 +366,12 @@ ...@@ -360,14 +366,12 @@
(define_insn "addchi5" (define_insn "addchi5"
[(set (match_operand:HI 0 "register_operand" "=T,r,r") [(set (match_operand:HI 0 "register_operand" "=T,r,r")
(plus:HI (plus:HI (match_operand:HI 1 "register_operand" "%0,0,0") (plus:HI (plus:HI (match_operand:HI 1 "register_operand" "%0,0,0")
(zero_extend:HI (match_operand:BI 3 (zero_extend:HI (reg:BI CARRY_REG)))
"register_operand"
"y,y,y")))
(match_operand:HI 2 "xs_hi_nonmemory_operand" "L,Ir,i"))) (match_operand:HI 2 "xs_hi_nonmemory_operand" "L,Ir,i")))
(set (match_operand:BI 4 "register_operand" "=y,y,y") (set (reg:BI CARRY_REG)
(truncate:BI (lshiftrt:SI (plus:SI (plus:SI (truncate:BI (lshiftrt:SI (plus:SI (plus:SI
(zero_extend:SI (match_dup 1)) (zero_extend:SI (match_dup 1))
(zero_extend:SI (match_dup 3))) (zero_extend:SI (reg:BI CARRY_REG)))
(zero_extend:SI (match_dup 2))) (zero_extend:SI (match_dup 2)))
(const_int 16))))] (const_int 16))))]
"" ""
...@@ -387,7 +391,7 @@ ...@@ -387,7 +391,7 @@
[(set (match_operand:HI 0 "register_operand" "=r,r,T,T,r,r,r") [(set (match_operand:HI 0 "register_operand" "=r,r,T,T,r,r,r")
(minus:HI (match_operand:HI 1 "register_operand" "0,0,0,0,0,0,0") (minus:HI (match_operand:HI 1 "register_operand" "0,0,0,0,0,0,0")
(match_operand:HI 2 "xs_hi_nonmemory_operand" "O,P,L,M,rI,M,i"))) (match_operand:HI 2 "xs_hi_nonmemory_operand" "O,P,L,M,rI,M,i")))
(clobber (match_scratch:BI 3 "=X,X,&y,&y,&y,&y,&y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"@ "@
dec %0,%o2 dec %0,%o2
...@@ -403,7 +407,7 @@ ...@@ -403,7 +407,7 @@
[(set (match_operand:HI 0 "register_operand" "=T,r,r") [(set (match_operand:HI 0 "register_operand" "=T,r,r")
(minus:HI (match_operand:HI 1 "register_operand" "0,0,0") (minus:HI (match_operand:HI 1 "register_operand" "0,0,0")
(match_operand:HI 2 "xs_hi_nonmemory_operand" "L,Ir,i"))) (match_operand:HI 2 "xs_hi_nonmemory_operand" "L,Ir,i")))
(set (match_operand:BI 3 "register_operand" "=y,y,y") (set (reg:BI CARRY_REG)
(truncate:BI (lshiftrt:SI (minus:SI (zero_extend:SI (match_dup 1)) (truncate:BI (lshiftrt:SI (minus:SI (zero_extend:SI (match_dup 1))
(zero_extend:SI (match_dup 2))) (zero_extend:SI (match_dup 2)))
(const_int 16))))] (const_int 16))))]
...@@ -417,14 +421,12 @@ ...@@ -417,14 +421,12 @@
(define_insn "subchi5" (define_insn "subchi5"
[(set (match_operand:HI 0 "register_operand" "=T,r,r") [(set (match_operand:HI 0 "register_operand" "=T,r,r")
(minus:HI (minus:HI (match_operand:HI 1 "register_operand" "0,0,0") (minus:HI (minus:HI (match_operand:HI 1 "register_operand" "0,0,0")
(zero_extend:HI (match_operand:BI 3 (zero_extend:HI (reg:BI CARRY_REG)))
"register_operand"
"y,y,y")))
(match_operand:HI 2 "xs_hi_nonmemory_operand" "L,Ir,i"))) (match_operand:HI 2 "xs_hi_nonmemory_operand" "L,Ir,i")))
(set (match_operand:BI 4 "register_operand" "=y,y,y") (set (reg:BI CARRY_REG)
(truncate:BI (lshiftrt:SI (minus:SI (minus:SI (truncate:BI (lshiftrt:SI (minus:SI (minus:SI
(zero_extend:SI (match_dup 1)) (zero_extend:SI (match_dup 1))
(zero_extend:SI (match_dup 3))) (zero_extend:SI (reg:BI CARRY_REG)))
(zero_extend:SI (match_dup 2))) (zero_extend:SI (match_dup 2)))
(const_int 16))))] (const_int 16))))]
"" ""
...@@ -511,7 +513,7 @@ ...@@ -511,7 +513,7 @@
[(set (match_operand:HI 0 "register_operand" "") [(set (match_operand:HI 0 "register_operand" "")
(not:HI (match_operand:HI 1 "register_operand" ""))) (not:HI (match_operand:HI 1 "register_operand" "")))
(parallel [(set (match_dup 0) (plus:HI (match_dup 0) (const_int 1))) (parallel [(set (match_dup 0) (plus:HI (match_dup 0) (const_int 1)))
(clobber (match_scratch:BI 3 ""))])] (clobber (reg:BI CARRY_REG))])]
"" ""
"") "")
...@@ -527,7 +529,7 @@ ...@@ -527,7 +529,7 @@
[(set (match_operand:HI 0 "register_operand" "=r") [(set (match_operand:HI 0 "register_operand" "=r")
(ashift:HI (match_operand:HI 1 "register_operand" "0") (ashift:HI (match_operand:HI 1 "register_operand" "0")
(match_operand:HI 2 "nonmemory_operand" "ri"))) (match_operand:HI 2 "nonmemory_operand" "ri")))
(clobber (match_scratch:BI 3 "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"shl %0,%2") "shl %0,%2")
...@@ -536,7 +538,7 @@ ...@@ -536,7 +538,7 @@
[(set (match_operand:HI 0 "register_operand" "=r") [(set (match_operand:HI 0 "register_operand" "=r")
(ashiftrt:HI (match_operand:HI 1 "register_operand" "0") (ashiftrt:HI (match_operand:HI 1 "register_operand" "0")
(match_operand:HI 2 "nonmemory_operand" "ri"))) (match_operand:HI 2 "nonmemory_operand" "ri")))
(clobber (match_scratch:BI 3 "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"asr %0,%2") "asr %0,%2")
...@@ -545,7 +547,7 @@ ...@@ -545,7 +547,7 @@
[(set (match_operand:HI 0 "register_operand" "=r") [(set (match_operand:HI 0 "register_operand" "=r")
(lshiftrt:HI (match_operand:HI 1 "register_operand" "0") (lshiftrt:HI (match_operand:HI 1 "register_operand" "0")
(match_operand:HI 2 "nonmemory_operand" "ri"))) (match_operand:HI 2 "nonmemory_operand" "ri")))
(clobber (match_scratch:BI 3 "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"shr %0,%2") "shr %0,%2")
...@@ -647,13 +649,13 @@ ...@@ -647,13 +649,13 @@
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (match_operand:SI 1 "register_operand" "%0") (plus:SI (match_operand:SI 1 "register_operand" "%0")
(match_operand:SI 2 "nonmemory_operand" "ri"))) (match_operand:SI 2 "nonmemory_operand" "ri")))
(clobber (match_scratch:BI 3 "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"#" "#"
"reload_completed" "reload_completed"
[(pc)] [(pc)]
"{ xstormy16_expand_arith (SImode, PLUS, operands[0], operands[1], "{ xstormy16_expand_arith (SImode, PLUS, operands[0], operands[1],
operands[2], operands[3]); DONE; } " operands[2]); DONE; } "
[(set_attr "length" "4")]) [(set_attr "length" "4")])
;; Subtraction ;; Subtraction
...@@ -661,33 +663,32 @@ ...@@ -661,33 +663,32 @@
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
(minus:SI (match_operand:SI 1 "register_operand" "0") (minus:SI (match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "nonmemory_operand" "ri"))) (match_operand:SI 2 "nonmemory_operand" "ri")))
(clobber (match_scratch:BI 3 "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"#" "#"
"reload_completed" "reload_completed"
[(pc)] [(pc)]
"{ xstormy16_expand_arith (SImode, MINUS, operands[0], operands[1], "{ xstormy16_expand_arith (SImode, MINUS, operands[0], operands[1],
operands[2], operands[3]); DONE; } " operands[2]); DONE; } "
[(set_attr "length" "4")]) [(set_attr "length" "4")])
(define_expand "negsi2" (define_expand "negsi2"
[(parallel [(set (match_operand:SI 0 "register_operand" "") [(parallel [(set (match_operand:SI 0 "register_operand" "")
(neg:SI (match_operand:SI 1 "register_operand" ""))) (neg:SI (match_operand:SI 1 "register_operand" "")))
(clobber (match_scratch:BI 2 ""))])] (clobber (reg:BI CARRY_REG))])]
"" ""
"{ operands[2] = gen_reg_rtx (HImode); "{ operands[2] = gen_reg_rtx (HImode); }")
operands[3] = gen_reg_rtx (BImode); }")
(define_insn_and_split "*negsi2_internal" (define_insn_and_split "*negsi2_internal"
[(set (match_operand:SI 0 "register_operand" "=&r") [(set (match_operand:SI 0 "register_operand" "=&r")
(neg:SI (match_operand:SI 1 "register_operand" "r"))) (neg:SI (match_operand:SI 1 "register_operand" "r")))
(clobber (match_scratch:BI 2 "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"#" "#"
"reload_completed" "reload_completed"
[(pc)] [(pc)]
"{ xstormy16_expand_arith (SImode, NEG, operands[0], operands[0], "{ xstormy16_expand_arith (SImode, NEG, operands[0], operands[0],
operands[1], operands[2]); DONE; }") operands[1]); DONE; }")
;; :::::::::::::::::::: ;; ::::::::::::::::::::
;; :: ;; ::
...@@ -700,44 +701,47 @@ ...@@ -700,44 +701,47 @@
[(parallel [(set (match_operand:SI 0 "register_operand" "") [(parallel [(set (match_operand:SI 0 "register_operand" "")
(ashift:SI (match_operand:SI 1 "register_operand" "") (ashift:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "const_int_operand" ""))) (match_operand:SI 2 "const_int_operand" "")))
(clobber (match_dup 3)) (clobber (reg:BI CARRY_REG))
(clobber (match_dup 4))])] (clobber (match_dup 3))])]
"" ""
" if (! const_int_operand (operands[2], SImode)) FAIL; " if (! const_int_operand (operands[2], SImode))
operands[3] = gen_reg_rtx (BImode); operands[4] = gen_reg_rtx (HImode); ") FAIL;
operands[3] = gen_reg_rtx (HImode); ")
;; Arithmetic Shift Right ;; Arithmetic Shift Right
(define_expand "ashrsi3" (define_expand "ashrsi3"
[(parallel [(set (match_operand:SI 0 "register_operand" "") [(parallel [(set (match_operand:SI 0 "register_operand" "")
(ashiftrt:SI (match_operand:SI 1 "register_operand" "") (ashiftrt:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "const_int_operand" ""))) (match_operand:SI 2 "const_int_operand" "")))
(clobber (match_dup 3)) (clobber (reg:BI CARRY_REG))
(clobber (match_dup 4))])] (clobber (match_dup 3))])]
"" ""
" if (! const_int_operand (operands[2], SImode)) FAIL; " if (! const_int_operand (operands[2], SImode))
operands[3] = gen_reg_rtx (BImode); operands[4] = gen_reg_rtx (HImode); ") FAIL;
operands[3] = gen_reg_rtx (HImode); ")
;; Logical Shift Right ;; Logical Shift Right
(define_expand "lshrsi3" (define_expand "lshrsi3"
[(parallel [(set (match_operand:SI 0 "register_operand" "") [(parallel [(set (match_operand:SI 0 "register_operand" "")
(lshiftrt:SI (match_operand:SI 1 "register_operand" "") (lshiftrt:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "const_int_operand" ""))) (match_operand:SI 2 "const_int_operand" "")))
(clobber (match_dup 3)) (clobber (reg:BI CARRY_REG))
(clobber (match_dup 4))])] (clobber (match_dup 3))])]
"" ""
" if (! const_int_operand (operands[2], SImode)) FAIL; " if (! const_int_operand (operands[2], SImode))
operands[3] = gen_reg_rtx (BImode); operands[4] = gen_reg_rtx (HImode); ") FAIL;
operands[3] = gen_reg_rtx (HImode); ")
(define_insn "*shiftsi" (define_insn "*shiftsi"
[(set (match_operand:SI 0 "register_operand" "=r,r") [(set (match_operand:SI 0 "register_operand" "=r,r")
(match_operator:SI 5 "shift_operator" (match_operator:SI 4 "shift_operator"
[(match_operand:SI 1 "register_operand" "0,0") [(match_operand:SI 1 "register_operand" "0,0")
(match_operand:SI 2 "const_int_operand" "U,n")])) (match_operand:SI 2 "const_int_operand" "U,n")]))
(clobber (match_operand:BI 3 "register_operand" "=y,y")) (clobber (reg:BI CARRY_REG))
(clobber (match_operand:HI 4 "" "=X,r"))] (clobber (match_operand:HI 3 "" "=X,r"))]
"" ""
"* return xstormy16_output_shift (SImode, GET_CODE (operands[5]), "* return xstormy16_output_shift (SImode, GET_CODE (operands[4]),
operands[0], operands[2], operands[4]);" operands[0], operands[2], operands[3]);"
[(set_attr "length" "6,10") [(set_attr "length" "6,10")
(set_attr "psw_operand" "clobber,clobber")]) (set_attr "psw_operand" "clobber,clobber")])
...@@ -845,7 +849,7 @@ ...@@ -845,7 +849,7 @@
"r,L,e")]) "r,L,e")])
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(clobber (match_operand:BI 4 "" "=&y,&y,&y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"* "*
{ {
...@@ -863,7 +867,7 @@ ...@@ -863,7 +867,7 @@
"r,L,e")]) "r,L,e")])
(pc) (pc)
(label_ref (match_operand 0 "" "")))) (label_ref (match_operand 0 "" ""))))
(clobber (match_operand:BI 4 "" "=&y,&y,&y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"* "*
{ {
...@@ -898,35 +902,31 @@ ...@@ -898,35 +902,31 @@
"ri")]) "ri")])
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(clobber (match_operand:SI 5 "register_operand" "=2")) (clobber (match_operand:SI 4 "register_operand" "=2"))
(clobber (match_operand:BI 4 "" "=&y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"#" "#"
"reload_completed" "reload_completed"
[(pc)] [(pc)]
"{ xstormy16_split_cbranch (SImode, operands[0], operands[1], operands[2], "{ xstormy16_split_cbranch (SImode, operands[0], operands[1], operands[2]); DONE; }"
operands[4]); DONE; }"
[(set_attr "length" "8")]) [(set_attr "length" "8")])
(define_insn "*ineqbranch_1" (define_insn "*ineqbranch_1"
[(set (pc) [(set (pc)
(if_then_else (match_operator:HI 5 "xstormy16_ineqsi_operator" (if_then_else (match_operator:HI 4 "xstormy16_ineqsi_operator"
[(minus:HI (match_operand:HI 1 "register_operand" [(minus:HI (match_operand:HI 1 "register_operand" "T,r,r")
"T,r,r") (zero_extend:HI (reg:BI CARRY_REG)))
(zero_extend:HI (match_operand:BI 4
"register_operand"
"y,y,y")))
(match_operand:HI 3 "nonmemory_operand" "L,Ir,i")]) (match_operand:HI 3 "nonmemory_operand" "L,Ir,i")])
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(set (match_operand:HI 2 "register_operand" "=1,1,1") (set (match_operand:HI 2 "register_operand" "=1,1,1")
(minus:HI (minus:HI (match_dup 1) (zero_extend:HI (match_dup 4))) (minus:HI (minus:HI (match_dup 1) (zero_extend:HI (reg:BI CARRY_REG)))
(match_dup 3))) (match_dup 3)))
(clobber (match_operand:BI 6 "" "=y,y,y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"* "*
{ {
return xstormy16_output_cbranch_si (operands[5], \"%l0\", 0, insn); return xstormy16_output_cbranch_si (operands[4], \"%l0\", 0, insn);
}" }"
[(set_attr "branch_class" "bcc8p2,bcc8p2,bcc8p4") [(set_attr "branch_class" "bcc8p2,bcc8p2,bcc8p4")
(set_attr "psw_operand" "2,2,2")]) (set_attr "psw_operand" "2,2,2")])
...@@ -1026,7 +1026,7 @@ ...@@ -1026,7 +1026,7 @@
;; Indirect jump through a register ;; Indirect jump through a register
(define_expand "indirect_jump" (define_expand "indirect_jump"
[(set (match_dup 1) (const_int 0)) [(set (match_dup 1) (const_int 0))
(parallel [(set (pc) (match_operand:HI 0 "register_operand" "r")) (parallel [(set (pc) (match_operand:HI 0 "register_operand" ""))
(use (match_dup 1))])] (use (match_dup 1))])]
"" ""
"operands[1] = gen_reg_rtx (HImode);") "operands[1] = gen_reg_rtx (HImode);")
...@@ -1231,7 +1231,7 @@ ...@@ -1231,7 +1231,7 @@
(const_int 0)) (const_int 0))
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(clobber (match_operand:BI 3 "" "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"bn %1,%B2,%l0" "bn %1,%B2,%l0"
[(set_attr "length" "4") [(set_attr "length" "4")
...@@ -1247,7 +1247,7 @@ ...@@ -1247,7 +1247,7 @@
(match_operand:HI 3 "immediate_operand" "i")) (match_operand:HI 3 "immediate_operand" "i"))
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(clobber (match_operand:BI 4 "" "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"bn %1,%B2,%l0" "bn %1,%B2,%l0"
[(set_attr "length" "4") [(set_attr "length" "4")
...@@ -1260,7 +1260,7 @@ ...@@ -1260,7 +1260,7 @@
(const_int 0)) (const_int 0))
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(clobber (match_operand:BI 3 "" "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"bn %1,%B2,%l0" "bn %1,%B2,%l0"
[(set_attr "length" "4") [(set_attr "length" "4")
...@@ -1274,7 +1274,7 @@ ...@@ -1274,7 +1274,7 @@
(const_int 1)) (const_int 1))
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(clobber (match_operand:BI 2 "" "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"bn %1,#7,%l0" "bn %1,#7,%l0"
[(set_attr "length" "4") [(set_attr "length" "4")
...@@ -1286,7 +1286,7 @@ ...@@ -1286,7 +1286,7 @@
(const_int 0)) (const_int 0))
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(clobber (match_operand:BI 2 "" "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"bn %1,#7,%l0" "bn %1,#7,%l0"
[(set_attr "length" "4") [(set_attr "length" "4")
...@@ -1299,7 +1299,7 @@ ...@@ -1299,7 +1299,7 @@
(const_int 0)) (const_int 0))
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(clobber (match_operand:BI 3 "" "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"bp %1,%B2,%l0" "bp %1,%B2,%l0"
[(set_attr "length" "4") [(set_attr "length" "4")
...@@ -1312,7 +1312,7 @@ ...@@ -1312,7 +1312,7 @@
(match_operand:HI 2 "immediate_operand" "i")) (match_operand:HI 2 "immediate_operand" "i"))
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(clobber (match_operand:BI 3 "" "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"bp %1,%b2,%l0" "bp %1,%b2,%l0"
[(set_attr "length" "4") [(set_attr "length" "4")
...@@ -1325,7 +1325,7 @@ ...@@ -1325,7 +1325,7 @@
(const_int 0)) (const_int 0))
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(clobber (match_operand:BI 3 "" "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"bp %1,%B2,%l0" "bp %1,%B2,%l0"
[(set_attr "length" "4") [(set_attr "length" "4")
...@@ -1337,7 +1337,7 @@ ...@@ -1337,7 +1337,7 @@
(const_int 7)) (const_int 7))
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(clobber (match_operand:BI 2 "" "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"bp %1,#7,%l0" "bp %1,#7,%l0"
[(set_attr "length" "4") [(set_attr "length" "4")
...@@ -1349,7 +1349,7 @@ ...@@ -1349,7 +1349,7 @@
(const_int 0)) (const_int 0))
(label_ref (match_operand 0 "" "")) (label_ref (match_operand 0 "" ""))
(pc))) (pc)))
(clobber (match_operand:BI 2 "" "=y"))] (clobber (reg:BI CARRY_REG))]
"" ""
"bp %1,#7,%l0" "bp %1,#7,%l0"
[(set_attr "length" "4") [(set_attr "length" "4")
......
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