diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 2e493ec1042b31e08264c4535f050f715cca478c..7df89ae8172f9fcec6aeb08d207adbb91143f34d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -452,7 +452,7 @@ typedef struct drm_i915_private { u32 savePIPEB_DATA_N1; u32 savePIPEB_LINK_M1; u32 savePIPEB_LINK_N1; - u32 saveRSTDBYCTL; + u32 saveMCHBAR_RENDER_STANDBY; struct { struct drm_mm gtt_space; diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 8b35f5e1c511bd3fb52677ea024b6109c599f7ea..1a56ae7b5a789fe863e9331aae7ee2fcc628e86a 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -272,23 +272,23 @@ static void i915_hotplug_work_func(struct work_struct *work) static void i915_handle_rps_change(struct drm_device *dev) { drm_i915_private_t *dev_priv = dev->dev_private; - u32 slow_up, slow_down, max_avg, min_avg; + u32 busy_up, busy_down, max_avg, min_avg; u16 rgvswctl; u8 new_delay = dev_priv->cur_delay; I915_WRITE(MEMINTRSTS, I915_READ(MEMINTRSTS) & ~MEMINT_EVAL_CHG); - slow_up = I915_READ(RCPREVBSYTUPAVG); - slow_down = I915_READ(RCPREVBSYTDNAVG); + busy_up = I915_READ(RCPREVBSYTUPAVG); + busy_down = I915_READ(RCPREVBSYTDNAVG); max_avg = I915_READ(RCBMAXAVG); min_avg = I915_READ(RCBMINAVG); /* Handle RCS change request from hw */ - if (slow_up > max_avg) { + if (busy_up > max_avg) { if (dev_priv->cur_delay != dev_priv->max_delay) new_delay = dev_priv->cur_delay - 1; if (new_delay < dev_priv->max_delay) new_delay = dev_priv->max_delay; - } else if (slow_down < min_avg) { + } else if (busy_down < min_avg) { if (dev_priv->cur_delay != dev_priv->min_delay) new_delay = dev_priv->cur_delay + 1; if (new_delay > dev_priv->min_delay) @@ -300,8 +300,8 @@ static void i915_handle_rps_change(struct drm_device *dev) rgvswctl = I915_READ(MEMSWCTL); if (rgvswctl & MEMCTL_CMD_STS) { - DRM_ERROR("gpu slow, RCS change rejected\n"); - return; /* still slow with another command */ + DRM_ERROR("gpu busy, RCS change rejected\n"); + return; /* still busy with another command */ } /* Program the new state */ diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c3948ee37c13976e1a5f89e01416748a4b0e34a9..d344c031f1880112ca2b9d153d6fc2d9ba8c6ab2 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -907,7 +907,7 @@ #define RCBMINAVG 0x111a0 #define RCUPEI 0x111b0 #define RCDNEI 0x111b4 -#define RSTDBYCTL 0x111b8 +#define MCHBAR_RENDER_STANDBY 0x111b8 #define RCX_SW_EXIT (1<<23) #define RSX_STATUS_MASK 0x00700000 #define VIDCTL 0x111c0 diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 2c346645acfac38a7919cedf28315877f65b4ebc..ac0d1a73ac224174f603a0bc3429e6a97464a2b6 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -682,7 +682,8 @@ void i915_restore_display(struct drm_device *dev) I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR); I915_WRITE(PCH_PP_CONTROL, dev_priv->savePP_CONTROL); - I915_WRITE(RSTDBYCTL, dev_priv->saveRSTDBYCTL); + I915_WRITE(MCHBAR_RENDER_STANDBY, + dev_priv->saveMCHBAR_RENDER_STANDBY); } else { I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL); @@ -746,7 +747,8 @@ int i915_save_state(struct drm_device *dev) dev_priv->saveGTIMR = I915_READ(GTIMR); dev_priv->saveFDI_RXA_IMR = I915_READ(FDI_RXA_IMR); dev_priv->saveFDI_RXB_IMR = I915_READ(FDI_RXB_IMR); - dev_priv->saveRSTDBYCTL = I915_READ(RSTDBYCTL); + dev_priv->saveMCHBAR_RENDER_STANDBY = + I915_READ(MCHBAR_RENDER_STANDBY); } else { dev_priv->saveIER = I915_READ(IER); dev_priv->saveIMR = I915_READ(IMR); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 4a93f7a0f58d4b1de85afa6146c5df15f60d1f37..9e80020ae2fe82b39ef5e334ea9e1f20526c31e1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4770,8 +4770,8 @@ void intel_init_clock_gating(struct drm_device *dev) if (obj_priv) { I915_WRITE(PWRCTXA, obj_priv->gtt_offset | PWRCTX_EN); - I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & - ~RCX_SW_EXIT); + I915_WRITE(MCHBAR_RENDER_STANDBY, + I915_READ(MCHBAR_RENDER_STANDBY) & ~RCX_SW_EXIT); } } }