diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f1dbdd4cb09f857f76c7f75f3a5fe9358c520c04..7307974d29eba58bba21394da2beab97fde7f0f9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9372,9 +9372,10 @@ intel_display_capture_error_state(struct drm_device *dev)
 
 		error->plane[i].control = I915_READ(DSPCNTR(i));
 		error->plane[i].stride = I915_READ(DSPSTRIDE(i));
-		if (INTEL_INFO(dev)->gen <= 3)
+		if (INTEL_INFO(dev)->gen <= 3) {
 			error->plane[i].size = I915_READ(DSPSIZE(i));
-		error->plane[i].pos = I915_READ(DSPPOS(i));
+			error->plane[i].pos = I915_READ(DSPPOS(i));
+		}
 		if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))
 			error->plane[i].addr = I915_READ(DSPADDR(i));
 		if (INTEL_INFO(dev)->gen >= 4) {
@@ -9417,9 +9418,10 @@ intel_display_print_error_state(struct seq_file *m,
 		seq_printf(m, "Plane [%d]:\n", i);
 		seq_printf(m, "  CNTR: %08x\n", error->plane[i].control);
 		seq_printf(m, "  STRIDE: %08x\n", error->plane[i].stride);
-		if (INTEL_INFO(dev)->gen <= 3)
+		if (INTEL_INFO(dev)->gen <= 3) {
 			seq_printf(m, "  SIZE: %08x\n", error->plane[i].size);
-		seq_printf(m, "  POS: %08x\n", error->plane[i].pos);
+			seq_printf(m, "  POS: %08x\n", error->plane[i].pos);
+		}
 		if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))
 			seq_printf(m, "  ADDR: %08x\n", error->plane[i].addr);
 		if (INTEL_INFO(dev)->gen >= 4) {