Limit BMC SPI Flash speed to 25MHz on Talos II systems

We have been receiving sporadic reports of BMC corruption and
failure to boot requiring external recovery.  The main suspect
is the Flash write speed; reduce it by 1/2 to stabilize writes
from the BMC to its main Flash storage device.

arch/arm/boot/dts/aspeed-bmc-opp-talos.dts

@@ -133,7 +133,7 @@
 		status = "okay";
 		m25p,fast-read;
 		label = "bmc";
-		spi-max-frequency = <50000000>;
+		spi-max-frequency = <25000000>;
 #include "openbmc-flash-layout.dtsi"
 	};
 };