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Commit c2eec2c9 authored by Stefan Tauner's avatar Stefan Tauner
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Add a bunch of new/tested stuff and various small changes 20 


Tested mainboards:
OK:
 - abit BX6 2.0
   Reported by Stefan Tauner
 - Acer EM61SM/EM61PM (used in Acer Aspire T180)
   Reported by Benjamin Bellec
 - ADLINK Express-HR
   Reported by Obermair Thomas
 - ASUS M3N-H/HDMI
   Reported by Franc Serres
 - Attro G5G100-P
   Reported by Christoph Grenz
 - ASRock 960GM-GS3 FX
   Reported by Fuley Istvan
 - Elitegroup P6BAP-A+ (V2.2)
   Reported by Arnaldo Pirrone
 - Elitegroup GeForce7050M-M (V2.0)
   Reported by Leif Middelschulte
 - Fujitsu D3041-A1 (used in ESPRIMO P2560)
   Reported by Daggi Duck
 - GIGABYTE GA-8S648
   Reported by TeslaBIOS
 - GIGABYTE GA-970A-D3P (rev. 1.0)
   Reported by Jean-Francois Pirus
 - GIGABYTE GA-B85M-D3H
   Reported by Mladen Milinković
 - GIGABYTE GA-X79-UD3
   Reported by Jeff O'Neil
 - GIGABYTE GA-X79-UP4 (rev. 1.0)
   Reported by George Spelvin
 - GIGABYTE GA-Z68MA-D2H-B3 (rev. 1.3)
   Reported by Vangelis Skarmoutsos
 - GIGABYTE GA-Z87-HD3
   Reported by virii5
 - Lenovo Tilapia CRB
   Reported by jenkins56 on IRC
 - MSI GT60-2OD (notebook, only with layout patches)
   Reported by Vasiliy Vylegzhanin
 - MSI MS-6704 (845PE Max2 PCB 1.0) (Pure Version w/o raid)
   Reported by professorll
 - MSI MS-7399 1.1 (used in Acer Aspire M5640/M3640)
   Reported by Koen Rousseau
 - MSI MS-7125 (K8N Neo4(-F/FI/FX))
   We had a board enable for that one for years, but it was not (and still is not)
   completely clear which boards are covered.
 - MSI MS-7522 (MSI X58 Pro-E)
   Reported by Gianluigi Tiesi
 - PCWARE APM80-D3
   Reported by César Augusto Jakoby
 - Pegatron IPP7A-CP
   Reported by Илья Шипко
 - Supermicro H8QME-2
   Reported by Greg Tippitt
 - Supermicro X7SPA-H
   Reported by Kyle Bentley
 - Supermicro X7SPE-HF-D525
   Reported by Micah Anderson
 - Supermicro X8DTE
   Reported by Mark Nipper
 - Supermicro X8SIL-F
   Reported by Peter Samuelson
 - ZOTAC IONITX-A (-E) version
   Reported by Maciej Wroniecki
NOT OK:
 - Supermicro X10SLM-F
   Reported by Micah Anderson

Flash chips:
 - Atmel AT29C020 to PREW (+PREW)
   It was marked like that in the past, but I could not find the reason why the
   test bits were reset. Urja Rannikko tested it again and it still works.
 - Eon EN25F10 to PREW (+PREW)
   Reported by Stolmár Tamás
 - Eon EN25QH64 to PR (+PR)
   Reported by Vladimir 'φ-coder' Serbinenko
 - GigaDevice GD25Q32(B) to PREW (+PREW)
   Reported by mrnuke
 - Macronix MX25L512(E)/MX25V512(C) to PREW (+PREW)
   Reported by Jamie Nichol
 - Macronix MX25L2005(C) to PREW (+PREW)
   Reported by Давыдов Дмитрий
 - Micron/Numonyx/ST N25Q064..1E to PREW (+PREW)
   Reported by Paolo Zambotti
 - Pmc Pm25LD010(C) to PREW (+PREW)
   Reported by Vasile Ceteras
 - Micron/Numonyx/ST M25P16 to PREW (+EW)
   Reported by raven
 - Micron/Numonyx/ST M25PX64 to PREW (+W)
   Reported by Zaolin
 - SST SST25VF020B to PREW (+PREW)
   Reported by Michaël Zweers
 - SST SST49LF040 to PREW (+W)
   Reported by Oskar Enoksson
 - Add support for MX25L3273E (evil twin of MX25L3205 et al.)
   Also, add MX25L1673 and MX25L6473E to the names of their twins and
   add a note about MX25L8073E.
 - Winbond W25X32 to PREW (+REW)
   Reported by The Raven
 - Winbond W29C010 etc. to PREW (+W)
   Reported by san

Chipsets tested OK:
 - Intel NM70 (8086:1e5f)
   Reported by mrnuke
 - Intel C204 (8086:1c54)
   Reported by Vasiliy Vylegzhanin
 - Intel QM67 (8086:1c4f)
   Reported by Obermair Thomas
 - Intel HM77 (8086:1e57)
   Reported by Vasiliy Vylegzhanin
 - Intel B85 (8086:8c50)
   Reported by Mladen Milinković
 - Intel HM87 (8086:8c4b)
   Reported by Vasiliy Vylegzhanin
 - Intel Z87 (8086:8c44)
   Reported by virii5
 - NVIDIA MCP51 (10de:0261)
   Reported by Marcin Kościelnicki
 - SiS 648 (1039:0648)
   Reported by TeslaBIOS

Miscellaneous:
 - Mark ARM-USB-TINY-H as tested in ft2232_spi (reported by _nanodev_).
 - getrevision.sh: Ignore failing date calls.
 - getrevision.sh: Fix -u and -l for older git versions which require = for the
   git log grep parameter.
 - Corrected K8T Neo2-F entries due to a report from Stelios Tsampas.
 - Add "-p internal" to output that requests users to send flashrom -V logs.
 - Add Macbook2,1, Thinkpad X230, EasyNote LM85 to laptop whitelist.
 - Tiny other stuff.

Corresponding to flashrom svn r1783.
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
parent f80419c7
Expand all Show whitespace changes
Inline Side-by-side
Showing with 148 additions and 74 deletions
board_enable.c
View file @ c2eec2c9
......@@ -334,7 +334,7 @@ void probe_superio_winbond(void)
}
}
msg_pinfo("Active config mode, unknown reg 0x20 ID: %02x.\n", model);
msg_pinfo("Please send the output of \"flashrom -V\" to \n"
msg_pinfo("Please send the output of \"flashrom -V -p internal\" to \n"
"flashrom@flashrom.org with W836xx: your board name: flashrom -V\n"
"as the subject to help us finish support for your Super I/O. Thanks.\n");
continue;
......@@ -489,7 +489,7 @@ static int w83627ehf_gpio22_raise_2e(void)
* Winbond W83627THF: Raise GPIO 44.
*
* Suited for:
* - MSI K8T Neo2-F
* - MSI K8T Neo2-F V2.0
*/
static int w83627thf_gpio44_raise_2e(void)
{
......@@ -619,11 +619,9 @@ int it8705f_write_enable(uint8_t port)
if (tmp & 0x02) {
/* The data sheet contradicts itself about max size. */
max_rom_decode.parallel = 1024 * 1024;
msg_pinfo("IT8705F with very unusual settings. Please "
"send the output of \"flashrom -V\" to \n"
"flashrom@flashrom.org with "
"IT8705: your board name: flashrom -V\n"
"as the subject to help us finish "
msg_pinfo("IT8705F with very unusual settings.\n"
"Please send the output of \"flashrom -V -p internal\" to flashrom@flashrom.org\n"
"with \"IT8705: your board name: flashrom -V\" as the subject to help us finish\n"
"support for your Super I/O. Thanks.\n");
ret = 1;
} else if (tmp & 0x08) {
......@@ -1110,7 +1108,7 @@ static int nvidia_mcp_gpio2_lower(void)
/*
* Suited for:
* - Foxconn 6150K8MD-8EKRSH: Socket 939 + NVIDIA MCP51
* - MSI K8N Neo4: NVIDIA CK804. TODO: Should probably be K8N Neo4 Platinum, see http://www.coreboot.org/pipermail/flashrom/2010-August/004362.html.
* - MSI K8N Neo4(-F/-FI/-FX/Platinum): NVIDIA CK804
* - MSI K8NGM2-L: NVIDIA MCP51
* - MSI K9N SLI: NVIDIA MCP55
*/
......@@ -2325,6 +2323,7 @@ const struct board_match board_matches[] = {
{0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, NULL, "artecgroup", "dbe62", P3, "Artec Group", "DBE62", 0, OK, board_artecgroup_dbe6x},
{0x8086, 0x27b9, 0xa0a0, 0x0632, 0x8086, 0x27da, 0xa0a0, 0x0632, NULL, NULL, NULL, P3, "AOpen", "i945GMx-VFX", 0, OK, intel_ich_gpio38_raise},
{0x8086, 0x277c, 0xa0a0, 0x060b, 0x8086, 0x27da, 0xa0a0, 0x060b, NULL, NULL, NULL, P3, "AOpen", "i975Xa-YDG", 0, OK, board_aopen_i975xa_ydg},
{0x8086, 0x27A0, 0x8086, 0x7270, 0x8086, 0x27B9, 0x8086, 0x7270, "^MacBook2,1$", NULL, NULL, P2, "Apple", "MacBook2,1", 0, OK, p2_whitelist_laptop},
{0x8086, 0x27b8, 0x1849, 0x27b8, 0x8086, 0x27da, 0x1849, 0x27da, "^ConRoeXFire-eSATA2", NULL, NULL, P3, "ASRock", "ConRoeXFire-eSATA2", 0, OK, intel_ich_gpio16_raise},
{0x1022, 0x1536, 0x1849, 0x1536, 0x1022, 0x780e, 0x1849, 0x780e, "^Kabini CRB$", NULL, NULL, P2, "ASRock", "IMB-A180(-H)", 0, OK, p2_not_a_laptop},
{0x1039, 0x0741, 0x1849, 0x0741, 0x1039, 0x5513, 0x1849, 0x5513, "^K7S41 $", NULL, NULL, P3, "ASRock", "K7S41", 0, OK, w836xx_memw_enable_2e},
......@@ -2425,14 +2424,15 @@ const struct board_match board_matches[] = {
{0x8086, 0x27a0, 0x17aa, 0x2017, 0x8086, 0x27b9, 0x17aa, 0x2009, "^ThinkPad T60", NULL, NULL, P2, "Lenovo", "T60(s)", 0, OK, p2_whitelist_laptop},
{0x8086, 0x27a0, 0x17aa, 0x2017, 0x8086, 0x27b9, 0x17aa, 0x2009, "^ThinkPad X60", NULL, NULL, P2, "Lenovo", "X60(s)", 0, OK, p2_whitelist_laptop},
{0x8086, 0x3B07, 0x17AA, 0x2166, 0x8086, 0x3B30, 0x17AA, 0x2167, "^Lenovo X201", NULL, NULL, P2, "Lenovo", "X201", 0, OK, p2_whitelist_laptop},
{0x8086, 0x1E22, 0x17AA, 0x21FA, 0x8086, 0x1E55, 0x17AA, 0x21FA, "^ThinkPad X230", NULL, NULL, P2, "Lenovo", "X230", 0, OK, p2_whitelist_laptop},
{0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, P3, "Mitac", "6513WU", 0, OK, board_mitac_6513wu},
{0x8086, 0x8186, 0x8086, 0x8186, 0x8086, 0x8800, 0, 0, "^MSC Vertriebs GmbH$", NULL, NULL, P2, "MSC", "Q7-TCTC", 0, OK, p2_not_a_laptop},
{0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, P3, "MSI", "K8N Neo4-F", 0, OK, nvidia_mcp_gpio2_raise}, /* TODO: Should probably be K8N Neo4 Platinum, see http://www.coreboot.org/pipermail/flashrom/2010-August/004362.html. */
{0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^MS-6163 (i440BX)$", NULL, NULL, P3, "MSI", "MS-6163 (MS-6163 Pro)", 0, OK, intel_piix4_gpo14_raise},
{0x8086, 0x244b, 0x1462, 0x3910, 0x8086, 0x2442, 0x1462, 0x3910, NULL, NULL, NULL, P3, "MSI", "MS-6391 (845 Pro4)", 0, OK, intel_ich_gpio23_raise},
{0x1039, 0x0745, 0, 0, 0x1039, 0x0018, 0, 0, "^MS-6561", NULL, NULL, P3, "MSI", "MS-6561 (745 Ultra)", 0, OK, w836xx_memw_enable_2e},
{0x8086, 0x2560, 0x1462, 0x5770, 0x8086, 0x2562, 0x1462, 0x5778, NULL, NULL, NULL, P3, "MSI", "MS-6577 (Xenon)", 0, OK, w83627hf_gpio25_raise_2e},
{0x13f6, 0x0111, 0x1462, 0x5900, 0x1106, 0x3177, 0x1106, 0, NULL, NULL, NULL, P3, "MSI", "MS-6590 (KT4 Ultra)", 0, OK, board_msi_kt4v},
{0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, P3, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio44_raise_2e},
{0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, "^MS-7094$", NULL, NULL, P3, "MSI", "MS-7094 (K8T Neo2-F V2.0)", 0, OK, w83627thf_gpio44_raise_2e},
{0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, P3, "MSI", "MS-6712 (KT4V)", 0, OK, board_msi_kt4v},
{0x1106, 0x3148, 0 , 0 , 0x1106, 0x3177, 0 , 0 , NULL, "msi", "ms6787", P3, "MSI", "MS-6787 (P4MAM-V/P4MAM-L)", 0, OK, w836xx_memw_enable_2e},
{0x8086, 0x24d3, 0x1462, 0x7880, 0x8086, 0x2570, 0, 0, NULL, NULL, NULL, P3, "MSI", "MS-6788-040 (848P NeoV)", 0, OK, intel_ich_gpio32_raise},
......@@ -2440,12 +2440,13 @@ const struct board_match board_matches[] = {
{0x10DE, 0x00E0, 0x1462, 0x0250, 0x10DE, 0x00E1, 0x1462, 0x0250, NULL, NULL, NULL, P3, "MSI", "MS-7025 (K8N Neo2 Platinum)", 0, OK, nvidia_mcp_gpio0c_raise},
{0x10DE, 0x00E0, 0x1462, 0x0300, 0x10DE, 0x00E1, 0x1462, 0x0300, NULL, NULL, NULL, P3, "MSI", "MS-7030 (K8N Neo Platinum)", 0, OK, nvidia_mcp_gpio0c_raise},
{0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, P3, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise},
{0x8086, 0x244b, 0x1462, 0x3910, 0x8086, 0x2442, 0x1462, 0x3910, NULL, NULL, NULL, P3, "MSI", "MS-6391 (845 Pro4)", 0, OK, intel_ich_gpio23_raise},
{0x1106, 0x3149, 0x1462, 0x7061, 0x1106, 0x3227, 0, 0, NULL, NULL, NULL, P3, "MSI", "MS-7061 (KM4M-V/KM4AM-V)", 0, OK, w836xx_memw_enable_2e},
{0x10DE, 0x005E, 0x1462, 0x7125, 0x10DE, 0x0052, 0x1462, 0x7125, NULL, NULL, NULL, P3, "MSI", "MS-7125 (K8N Neo4(-F/-FI/-FX/Platinum))", 0, OK, nvidia_mcp_gpio2_raise},
{0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", P3, "MSI", "MS-7135 (K8N Neo3)", 0, OK, w83627thf_gpio44_raise_4e},
{0x10DE, 0x0270, 0x1462, 0x7207, 0x10DE, 0x0264, 0x1462, 0x7207, NULL, NULL, NULL, P3, "MSI", "MS-7207 (K8NGM2-L)", 0, NT, nvidia_mcp_gpio2_raise},
{0x10DE, 0x0360, 0x1462, 0x7250, 0x10DE, 0x0368, 0x1462, 0x7250, NULL, NULL, NULL, P3, "MSI", "MS-7250 (K9N SLI)", 0, OK, nvidia_mcp_gpio2_raise},
{0x1011, 0x0019, 0xaa55, 0xaa55, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, P3, "Nokia", "IP530", 0, OK, fdc37b787_gpio50_raise_3f0},
{0x8086, 0x3B30, 0x1025, 0x0379, 0x8086, 0x3B09, 0x1025, 0x0379, "^EasyNote LM85$", NULL, NULL, P2, "Packard Bell","EasyNote LM85", 0, OK, p2_whitelist_laptop},
{0x8086, 0x24d3, 0x144d, 0xb025, 0x8086, 0x1050, 0x144d, 0xb025, NULL, NULL, NULL, P3, "Samsung", "Polaris 32", 0, OK, intel_ich_gpio21_raise},
{0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", P3, "Shuttle", "AK31", 0, OK, w836xx_memw_enable_2e},
{0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, P3, "Shuttle", "AK38N", 256, OK, NULL},
......
chipset_enable.c
View file @ c2eec2c9
......@@ -982,7 +982,7 @@ static int enable_flash_vt82c586(struct pci_dev *dev, const char *name)
/* Works for VT82C686A/B too. */
static int enable_flash_vt82c596(struct pci_dev *dev, const char *name)
{
/* Enable decoding of 0xFFF80000 to 0xFFFFFFFF. (1 MB) */
/* Enable decoding of 0xFFF00000 to 0xFFFFFFFF. (1 MB) */
max_rom_decode.parallel = 1024 * 1024;
return enable_flash_amd_via(dev, name, 0xE0);
}
......@@ -1288,11 +1288,9 @@ static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name)
ret = 1;
out_msg:
msg_pinfo("Please send the output of \"flashrom -V\" to "
"flashrom@flashrom.org with\n"
"your board name: flashrom -V as the subject to help us "
"finish support for your\n"
"chipset. Thanks.\n");
msg_pinfo("Please send the output of \"flashrom -V -p internal\" to flashrom@flashrom.org\n"
"with \"your board name: flashrom -V\" as the subject to help us finish support\n"
"for your chipset. Thanks.\n");
return ret;
}
......@@ -1388,7 +1386,7 @@ const struct penable chipset_enables[] = {
{0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540},
{0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540},
{0x1039, 0x0646, OK, "SiS", "645DX", enable_flash_sis540},
{0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540},
{0x1039, 0x0648, OK, "SiS", "648", enable_flash_sis540},
{0x1039, 0x0650, OK, "SiS", "650", enable_flash_sis540},
{0x1039, 0x0651, OK, "SiS", "651", enable_flash_sis540},
{0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540},
......@@ -1418,7 +1416,7 @@ const struct penable chipset_enables[] = {
/* Slave, should not be here, to fix known bug for A01. */
{0x10de, 0x00d3, OK, "NVIDIA", "CK804", enable_flash_ck804},
{0x10de, 0x0260, OK, "NVIDIA", "MCP51", enable_flash_ck804},
{0x10de, 0x0261, NT, "NVIDIA", "MCP51", enable_flash_ck804},
{0x10de, 0x0261, OK, "NVIDIA", "MCP51", enable_flash_ck804},
{0x10de, 0x0262, NT, "NVIDIA", "MCP51", enable_flash_ck804},
{0x10de, 0x0263, NT, "NVIDIA", "MCP51", enable_flash_ck804},
{0x10de, 0x0360, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* M57SLI*/
......@@ -1490,14 +1488,14 @@ const struct penable chipset_enables[] = {
{0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_pch6},
{0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_pch6},
{0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_pch6},
{0x8086, 0x1c4f, NT, "Intel", "QM67", enable_flash_pch6},
{0x8086, 0x1c4f, OK, "Intel", "QM67", enable_flash_pch6},
{0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_pch6},
{0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_pch6},
{0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_pch6},
{0x8086, 0x1c54, OK, "Intel", "C204", enable_flash_pch6},
{0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_pch6},
{0x8086, 0x1c5c, OK, "Intel", "H61", enable_flash_pch6},
{0x8086, 0x1d40, OK, "Intel", "X79", enable_flash_pch6},
{0x8086, 0x1d41, OK, "Intel", "X79", enable_flash_pch6},
{0x8086, 0x1d40, OK, "Intel", "C60x/X79", enable_flash_pch6},
{0x8086, 0x1d41, OK, "Intel", "C60x/X79", enable_flash_pch6},
{0x8086, 0x1e44, OK, "Intel", "Z77", enable_flash_pch7},
{0x8086, 0x1e46, NT, "Intel", "Z75", enable_flash_pch7},
{0x8086, 0x1e47, NT, "Intel", "Q77", enable_flash_pch7},
......@@ -1507,12 +1505,12 @@ const struct penable chipset_enables[] = {
{0x8086, 0x1e53, NT, "Intel", "C216", enable_flash_pch7},
{0x8086, 0x1e55, OK, "Intel", "QM77", enable_flash_pch7},
{0x8086, 0x1e56, NT, "Intel", "QS77", enable_flash_pch7},
{0x8086, 0x1e57, NT, "Intel", "HM77", enable_flash_pch7},
{0x8086, 0x1e57, OK, "Intel", "HM77", enable_flash_pch7},
{0x8086, 0x1e58, NT, "Intel", "UM77", enable_flash_pch7},
{0x8086, 0x1e59, NT, "Intel", "HM76", enable_flash_pch7},
{0x8086, 0x1e5d, NT, "Intel", "HM75", enable_flash_pch7},
{0x8086, 0x1e5e, NT, "Intel", "HM70", enable_flash_pch7},
{0x8086, 0x1e5f, NT, "Intel", "NM70", enable_flash_pch7},
{0x8086, 0x1e5f, OK, "Intel", "NM70", enable_flash_pch7},
{0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7},
{0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7},
{0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich0},
......@@ -1580,19 +1578,19 @@ const struct penable chipset_enables[] = {
{0x8086, 0x8c41, NT, "Intel", "Lynx Point Mobile Engineering Sample", enable_flash_pch8},
{0x8086, 0x8c42, NT, "Intel", "Lynx Point Desktop Engineering Sample", enable_flash_pch8},
{0x8086, 0x8c43, NT, "Intel", "Lynx Point", enable_flash_pch8},
{0x8086, 0x8c44, NT, "Intel", "Z87", enable_flash_pch8},
{0x8086, 0x8c44, OK, "Intel", "Z87", enable_flash_pch8},
{0x8086, 0x8c45, NT, "Intel", "Lynx Point", enable_flash_pch8},
{0x8086, 0x8c46, NT, "Intel", "Z85", enable_flash_pch8},
{0x8086, 0x8c47, NT, "Intel", "Lynx Point", enable_flash_pch8},
{0x8086, 0x8c48, NT, "Intel", "Lynx Point", enable_flash_pch8},
{0x8086, 0x8c49, NT, "Intel", "HM86", enable_flash_pch8},
{0x8086, 0x8c4a, OK, "Intel", "H87", enable_flash_pch8},
{0x8086, 0x8c4b, NT, "Intel", "HM87", enable_flash_pch8},
{0x8086, 0x8c4b, OK, "Intel", "HM87", enable_flash_pch8},
{0x8086, 0x8c4c, NT, "Intel", "Q85", enable_flash_pch8},
{0x8086, 0x8c4d, NT, "Intel", "Lynx Point", enable_flash_pch8},
{0x8086, 0x8c4e, NT, "Intel", "Q87", enable_flash_pch8},
{0x8086, 0x8c4f, NT, "Intel", "QM87", enable_flash_pch8},
{0x8086, 0x8c50, NT, "Intel", "B85", enable_flash_pch8},
{0x8086, 0x8c50, OK, "Intel", "B85", enable_flash_pch8},
{0x8086, 0x8c51, NT, "Intel", "Lynx Point", enable_flash_pch8},
{0x8086, 0x8c52, NT, "Intel", "C222", enable_flash_pch8},
{0x8086, 0x8c53, NT, "Intel", "Lynx Point", enable_flash_pch8},
......
cli_output.c
View file @ c2eec2c9
......@@ -36,7 +36,7 @@ int close_logfile(void)
if (fclose(logfile)) {
/* fclose returned an error. Stop writing to be safe. */
logfile = NULL;
msg_perr("Closing the log file returned error %s\n", strerror(errno));
msg_gerr("Closing the log file returned error %s\n", strerror(errno));
return 1;
}
logfile = NULL;
......
dummyflasher.c
View file @ c2eec2c9
......@@ -377,11 +377,14 @@ int dummy_init(void)
msg_pdbg("Filling fake flash chip with 0xff, size %i\n", emu_chip_size);
memset(flashchip_contents, 0xff, emu_chip_size);
/* Will be freed by shutdown function if necessary. */
emu_persistent_image = extract_programmer_param("image");
if (!emu_persistent_image) {
/* Nothing else to do. */
goto dummy_init_out;
}
/* We will silently (in default verbosity) ignore the file if it does not exist (yet) or the size does
* not match the emulated chip. */
if (!stat(emu_persistent_image, &image_stat)) {
msg_pdbg("Found persistent image %s, size %li ",
emu_persistent_image, (long)image_stat.st_size);
......@@ -414,7 +417,7 @@ dummy_init_out:
void *dummy_map(const char *descr, uintptr_t phys_addr, size_t len)
{
msg_pspew("%s: Mapping %s, 0x%zx bytes at 0x%*" PRIxPTR "\n",
msg_pspew("%s: Mapping %s, 0x%zx bytes at 0x%0*" PRIxPTR "\n",
__func__, descr, len, PRIxPTR_WIDTH, phys_addr);
return (void *)phys_addr;
}
......
flashchips.c
View file @ c2eec2c9
......@@ -2275,7 +2275,7 @@ const struct flashchip flashchips[] = {
.total_size = 256,
.page_size = 256,
.feature_bits = FEATURE_LONG_RESET,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_jedec,
.probe_timing = 10000, /* 10ms */
.block_erasers =
......@@ -3228,7 +3228,7 @@ const struct flashchip flashchips[] = {
.total_size = 128,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -4271,7 +4271,7 @@ const struct flashchip flashchips[] = {
/* OTP: 512B total; enter 0x3A */
/* QPI enable 0x38, disable 0xFF */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PR,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers = {
......@@ -5173,7 +5173,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -5917,7 +5917,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* MX25L512E supports SFDP */
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -5991,7 +5991,7 @@ const struct flashchip flashchips[] = {
.total_size = 256,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -6172,7 +6172,7 @@ const struct flashchip flashchips[] = {
{
.vendor = "Macronix",
.name = "MX25L1605D/MX25L1608D",
.name = "MX25L1605D/MX25L1608D/MX25L1673E",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = MACRONIX_MX25L1605,
......@@ -6387,6 +6387,45 @@ const struct flashchip flashchips[] = {
.voltage = {2700, 3600},
},
{
.vendor = "Macronix",
.name = "MX25L3273E",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = MACRONIX_MX25L3205,
.total_size = 4096,
.page_size = 256,
/* OTP: 64B total; enter 0xB1, exit 0xC1 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 1024} },
.block_erase = spi_block_erase_20,
}, {
.eraseblocks = { {32 * 1024, 128} },
.block_erase = spi_block_erase_52,
}, {
.eraseblocks = { {64 * 1024, 64} },
.block_erase = spi_block_erase_d8,
}, {
.eraseblocks = { {4 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_60,
}, {
.eraseblocks = { {4 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_c7,
},
},
.printlock = spi_prettyprint_status_register_default_bp3,
.unlock = spi_disable_blockprotect,
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B) and dual I/O supported */
.voltage = {2700, 3600},
},
{
.vendor = "Macronix",
.name = "MX25L3235D",
......@@ -6497,7 +6536,7 @@ const struct flashchip flashchips[] = {
{
.vendor = "Macronix",
.name = "MX25L6445E",
.name = "MX25L6445E/MX25L6473E",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = MACRONIX_MX25L6405,
......@@ -7155,7 +7194,7 @@ const struct flashchip flashchips[] = {
.total_size = 2048,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PR,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -7484,6 +7523,7 @@ const struct flashchip flashchips[] = {
.unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: per 64kB sector lock registers */
.write = spi_chip_write_256,
.read = spi_chip_read,
.voltage = {2300, 3600},
},
{
......@@ -7529,7 +7569,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 64B total; read 0x4B; write 0x42 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_OK_PRE,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -7549,6 +7589,7 @@ const struct flashchip flashchips[] = {
.unlock = spi_disable_blockprotect_bp2_srwd, /* TODO: per 64kB sector lock registers */
.write = spi_chip_write_256,
.read = spi_chip_read,
.voltage = {2700, 3600},
},
{
......@@ -7802,7 +7843,7 @@ const struct flashchip flashchips[] = {
/* supports SFDP */
/* OTP: 64B total; read 0x4B, write 0x42 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -8394,7 +8435,7 @@ const struct flashchip flashchips[] = {
.total_size = 128,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -9666,7 +9707,7 @@ const struct flashchip flashchips[] = {
.total_size = 256,
.page_size = 256,
.feature_bits = FEATURE_WRSR_EWSR,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -10766,7 +10807,7 @@ const struct flashchip flashchips[] = {
.total_size = 512,
.page_size = 4096,
.feature_bits = FEATURE_EITHER_RESET,
.tested = TEST_OK_PRE,
.tested = TEST_OK_PREW,
.probe = probe_jedec,
.probe_timing = 1, /* 150 ns */
.block_erasers =
......@@ -12298,7 +12339,7 @@ const struct flashchip flashchips[] = {
.total_size = 4096,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PROBE,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -12374,7 +12415,7 @@ const struct flashchip flashchips[] = {
.total_size = 128,
.page_size = 128,
.feature_bits = FEATURE_LONG_RESET,
.tested = TEST_OK_PRE,
.tested = TEST_OK_PREW,
.probe = probe_w29ee011,
.probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (w29ee011.c) */
.block_erasers =
......
flashchips.h
View file @ c2eec2c9
......@@ -434,11 +434,11 @@
#define MACRONIX_MX25L1005 0x2011 /* Same as MX25L1005C, MX25L1006E */
#define MACRONIX_MX25L2005 0x2012 /* Same as MX25L2005C */
#define MACRONIX_MX25L4005 0x2013 /* Same as MX25L4005A, MX25L4005C */
#define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005 */
#define MACRONIX_MX25L1605 0x2015 /* MX25L1605 (64k 0x20); MX25L1605A/MX25L1606E (4k 0x20, 64k 0x52); MX25L1605D/MX25L1608D (4k 0x20) */
#define MACRONIX_MX25L3205 0x2016 /* MX25L3205, MX25L3205A (64k 0x20); MX25L3205D/MX25L3208D (4k 0x20); MX25L3206E (4k 0x20, 64k 0x52) */
#define MACRONIX_MX25L6405 0x2017 /* MX25L6405, MX25L6405D (64k 0x20); MX25L6406E/MX25L6436E (4k 0x20); MX25L6445E (4k 0x20, 64k 0x52) */
#define MACRONIX_MX25L12805 0x2018 /* Same as MX25L12805D */
#define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005; FIXME: MX25L8073E (4k 0x20) */
#define MACRONIX_MX25L1605 0x2015 /* MX25L1605 (64k 0x20); MX25L1605A/MX25L1606E (4k 0x20, 64k 0x52); MX25L1605D/MX25L1608D/MX25L1673E (4k 0x20) */
#define MACRONIX_MX25L3205 0x2016 /* MX25L3205, MX25L3205A (64k 0x20); MX25L3205D/MX25L3208D (4k 0x20); MX25L3206E (4k 0x20, 64k 0x52); MX25L3273E (4k 0x20, 32k 0x52) */
#define MACRONIX_MX25L6405 0x2017 /* MX25L6405, MX25L6405D (64k 0x20); MX25L6406E/MX25L6436E (4k 0x20); MX25L6445E/MX25L6473E (4k 0x20, 32k 0x52) */
#define MACRONIX_MX25L12805 0x2018 /* Same as MX25L12805D, MX25L12835F, MX25L12845E (the latter two support completely new ID commands) */
#define MACRONIX_MX25L25635F 0x2019 /* Same as MX25L25639F, but the latter seems to not support REMS */
#define MACRONIX_MX25L1635D 0x2415
#define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */
......@@ -590,6 +590,7 @@
#define SST_SST25VF064C 0x254B
#define SST_SST26VF016 0x2601
#define SST_SST26VF032 0x2602
#define SST_SST26VF064B 0x2643
#define SST_SST27SF512 0xA4
#define SST_SST27SF010 0xA5
#define SST_SST27SF020 0xA6
......
flashrom.8.tmpl
View file @ c2eec2c9
......@@ -577,7 +577,7 @@ by the selected programmer is installed in your system. The syntax is
.sp
where
.B xxxx
is the name of the programmer
is the name of the programmer,
.B bb
is the PCI bus number,
.B dd
......
ft2232_spi.c
View file @ c2eec2c9
......@@ -70,7 +70,7 @@ const struct dev_entry devs_ft2232spi[] = {
{OLIMEX_VID, OLIMEX_ARM_OCD_PID, NT, "Olimex", "ARM-USB-OCD"},
{OLIMEX_VID, OLIMEX_ARM_TINY_PID, OK, "Olimex", "ARM-USB-TINY"},
{OLIMEX_VID, OLIMEX_ARM_OCD_H_PID, NT, "Olimex", "ARM-USB-OCD-H"},
{OLIMEX_VID, OLIMEX_ARM_TINY_H_PID, NT, "Olimex", "ARM-USB-TINY-H"},
{OLIMEX_VID, OLIMEX_ARM_TINY_H_PID, OK, "Olimex", "ARM-USB-TINY-H"},
{0},
};
......
it87spi.c
View file @ c2eec2c9
......@@ -264,8 +264,7 @@ int init_superio_ite(void)
ret |= it87spi_probe(superios[i].port);
break;
default:
msg_pdbg("Super I/O ID 0x%04hx is not on the list of "
"flash capable controllers.\n",
msg_pdbg2("Super I/O ID 0x%04hx is not on the list of flash-capable controllers.\n",
superios[i].model);
}
}
......
print.c
View file @ c2eec2c9
This diff is collapsed.
spi25_statusreg.c
View file @ c2eec2c9
......@@ -640,7 +640,7 @@ int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash)
int spi_prettyprint_status_register_bp2_ep_srwd(struct flashctx *flash)
{
uint8_t status = spi_read_status_register(flash);
msg_cdbg("Chip status register is 0x%02x\n", status);
spi_prettyprint_status_register_hex(status);
spi_prettyprint_status_register_srwd(status);
msg_cdbg("Chip status register: Program Fail Flag (P_FAIL) is %sset\n",
......
util/getrevision.sh
View file @ c2eec2c9
......@@ -173,7 +173,7 @@ local_revision() {
elif git_is_file_tracked "$1" ; then
r=$(git_last_commit "$1")
local svn_base=$(git log --grep git-svn-id -1 --format='%h')
local svn_base=$(git log --grep=git-svn-id -1 --format='%h')
if [ "$svn_base" != "" ] ; then
local diff_to_svn=$(git rev-list --count ${svn_base}..${r})
if [ "$diff_to_svn" -gt 0 ] ; then
......@@ -204,7 +204,7 @@ upstream_revision() {
# If this is a "native" git-svn clone we could use git svn log:
# git svn log --oneline -1 | sed 's/^r//;s/[[:blank:]].*//' or even git svn find-rev
# but it is easier to just grep for the git-svn-id unconditionally
r=$(git log --grep git-svn-id -1 -- "$1" | \
r=$(git log --grep=git-svn-id -1 -- "$1" | \
grep git-svn-id | \
sed 's/.*@/r/;s/[[:blank:]].*//')
fi
......@@ -247,7 +247,7 @@ main() {
local query_path=
local action=
# The is the main loop
# Argument parser loop
while [ $# -gt 0 ];
do
case ${1} in
......@@ -286,7 +286,7 @@ main() {
fi
query_path=$1
else
echo "Warning: Ignoring over-abundant paramter: \"${1}\"">&2
echo "Warning: Ignoring overabundant parameter: \"${1}\"">&2
fi
shift;;
esac;
......
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