diff --git a/Makefile b/Makefile
index 45b8f94be27b21a1d3ce8c0fce574ef5c91c05fb..b259a1646465629d1665603ce5a4204489b4aa11 100644
--- a/Makefile
+++ b/Makefile
@@ -35,7 +35,7 @@ OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.o \
 	sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o physmap.o \
 	flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \
 	ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o internal.o \
-	dummyflasher.o
+	dummyflasher.o nic3com.o
 
 all: pciutils dep $(PROGRAM)
 
diff --git a/flash.h b/flash.h
index 2a11c242007c8ad685ff3c75685fab5a0a362db0..a843b9d1e66d62f116ff93626436fe2d6d40d899 100644
--- a/flash.h
+++ b/flash.h
@@ -79,6 +79,7 @@
 extern int programmer;
 #define PROGRAMMER_INTERNAL	0x00
 #define PROGRAMMER_DUMMY	0x01
+#define PROGRAMMER_NIC3COM	0x02
 
 struct programmer_entry {
 	const char *vendor;
@@ -281,6 +282,7 @@ extern struct flashchip flashchips[];
 #define AT_45DB321D		0x2701 /* Buggy data sheet */
 #define AT_45DB642		/* No ID available */
 #define AT_45DB642D		0x2800
+#define AT_49BV512		0x03
 #define AT_49F002N		0x07	/* for AT49F002(N)  */
 #define AT_49F002NT		0x08	/* for AT49F002(N)T */
 
@@ -601,6 +603,18 @@ uint8_t dummy_chip_readb(const volatile void *addr);
 uint16_t dummy_chip_readw(const volatile void *addr);
 uint32_t dummy_chip_readl(const volatile void *addr);
 
+/* nic3com.c */
+int nic3com_init(void);
+int nic3com_shutdown(void);
+void *nic3com_map(const char *descr, unsigned long phys_addr, size_t len);
+void nic3com_unmap(void *virt_addr, size_t len);
+void nic3com_chip_writeb(uint8_t val, volatile void *addr);
+void nic3com_chip_writew(uint16_t val, volatile void *addr);
+void nic3com_chip_writel(uint32_t val, volatile void *addr);
+uint8_t nic3com_chip_readb(const volatile void *addr);
+uint16_t nic3com_chip_readw(const volatile void *addr);
+uint32_t nic3com_chip_readl(const volatile void *addr);
+
 /* flashrom.c */
 extern int verbose;
 #define printf_debug(x...) { if (verbose) printf(x); }
diff --git a/flashchips.c b/flashchips.c
index 6910c2c3510b9c82aa0edf50a50d2876b0d192ca..bc203daeb16cb00b33921fc507f0c68b4b17e9da 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -528,6 +528,20 @@ struct flashchip flashchips[] = {
 		.read		= NULL,
 	},
 
+	{
+		.vendor		= "Atmel",
+		.name		= "AT49BV512",
+		.manufacture_id	= ATMEL_ID,
+		.model_id	= AT_49BV512,
+		.total_size	= 64,
+		.page_size	= 64,
+		.tested		= TEST_OK_PREW,
+		.probe		= probe_jedec,
+		.erase		= erase_chip_jedec,
+		.write		= write_49f002,
+		.read		= read_memmapped,
+	},
+
 	{
 		.vendor		= "Atmel",
 		.name		= "AT49F002(N)",
diff --git a/flashrom.8 b/flashrom.8
index 46a3742c2bdef6716ed32435df17db7a50bc83ef..7a48041ef18071bb5613c2f3f787403373de3204 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -127,7 +127,9 @@ of the box.
 Specify the programmer device. Currently supported are:
 .sp
 .BR " internal" " (default, for in-system flashing in the mainboard)"
-
+.br
+.BR " nic3com" " (for flash ROMs on 3COM network cards)"
+.br
 .BR " dummy" " (just prints all operations and accesses)"
 .TP
 .B "\-h, \-\-help"
diff --git a/flashrom.c b/flashrom.c
index f76722a0a5352250202d9255763a7e35040ba261..4e0e5795a015a09bbda1b6e976938af655ef9e42 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -63,6 +63,19 @@ const struct programmer_entry programmer_table[] = {
 		.chip_writel		= dummy_chip_writel,
 	},
 
+	{
+		.init			= nic3com_init,
+		.shutdown		= nic3com_shutdown,
+		.map_flash_region	= nic3com_map,
+		.unmap_flash_region	= nic3com_unmap,
+		.chip_readb		= nic3com_chip_readb,
+		.chip_readw		= nic3com_chip_readw,
+		.chip_readl		= nic3com_chip_readl,
+		.chip_writeb		= nic3com_chip_writeb,
+		.chip_writew		= nic3com_chip_writew,
+		.chip_writel		= nic3com_chip_writel,
+	},
+
 	{},
 };
 
@@ -439,6 +452,8 @@ int main(int argc, char *argv[])
 				programmer = PROGRAMMER_INTERNAL;
 			} else if (strncmp(optarg, "dummy", 5) == 0) {
 				programmer = PROGRAMMER_DUMMY;
+			} else if (strncmp(optarg, "nic3com", 7) == 0) {
+				programmer = PROGRAMMER_NIC3COM;
 			} else {
 				printf("Error: Unknown programmer.\n");
 				exit(1);
diff --git a/nic3com.c b/nic3com.c
new file mode 100644
index 0000000000000000000000000000000000000000..977273196e7b688b808b69271c1f764003a3a237
--- /dev/null
+++ b/nic3com.c
@@ -0,0 +1,170 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <stdlib.h>
+#include <string.h>
+#include <errno.h>
+#include <sys/io.h>
+#include <pci/pci.h>
+#include "flash.h"
+
+#define BIOS_ROM_ADDR		0x04
+#define BIOS_ROM_DATA		0x08
+#define INT_STATUS		0x0e
+#define SELECT_REG_WINDOW	0x800
+
+#define PCI_IO_BASE_ADDRESS	0x10
+
+#define PCI_VENDOR_ID_3COM	0x10b7
+
+uint32_t io_base_addr;
+struct pci_access *pacc;
+
+#define OK 0
+#define NT 1	/* Not tested */
+
+static struct nic_status {
+	uint16_t device_id;
+	int status;
+	const char *device_name;
+} nics[] = {
+	/* 3C90xB */
+	{0x9055, NT, "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX"},
+	{0x9001, NT, "3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4" },
+	{0x9004, NT, "3C90xB: PCI 10BASE-T (TPO)" },
+	{0x9005, NT, "3C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO)" },
+	{0x9006, NT, "3C90xB: PCI 10BASE-T/10BASE2 (TPC)" },
+	{0x900a, NT, "3C90xB: PCI 10BASE-FL" },
+	{0x905a, NT, "3C90xB: PCI 10BASE-FX" },
+
+	/* 3C905C */
+	{0x9200, OK, "3C905C: EtherLink 10/100 PCI (TX)" },
+
+	/* 3C980C */
+	{0x9805, NT, "3C980C: EtherLink Server 10/100 PCI (TX)" },
+
+	{},
+};
+
+int nic3com_init(void)
+{
+	int i, found = 0;
+	struct pci_dev *dev;
+
+#if defined (__sun) && (defined(__i386) || defined(__amd64))
+	if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
+#elif defined(__FreeBSD__) || defined (__DragonFly__)
+	if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
+#else
+	if (iopl(3) != 0) {
+#endif
+		fprintf(stderr, "ERROR: Could not get IO privileges (%s).\n"
+			"You need to be root.\n", strerror(errno));
+		exit(1);
+	}
+
+	pacc = pci_alloc();     /* Get the pci_access structure */
+	pci_init(pacc);         /* Initialize the PCI library */
+	pci_scan_bus(pacc);     /* We want to get the list of devices */
+
+	for (i = 0; nics[i].device_name != NULL; i++) {
+		dev = pci_dev_find(PCI_VENDOR_ID_3COM, nics[i].device_id);
+		if (!dev)
+			continue;
+
+		io_base_addr = pci_read_long(dev, PCI_IO_BASE_ADDRESS) & ~0x03;
+
+		printf("Found NIC \"3COM %s\" (%04x:%04x), addr = 0x%x\n",
+		       nics[i].device_name, PCI_VENDOR_ID_3COM,
+		       nics[i].device_id, io_base_addr);
+
+		if (nics[i].status == NT) {
+			printf("===\nThis NIC is UNTESTED. Please email a "
+			       "report including the 'flashrom -p nic3com'\n"
+			       "output to flashrom@coreboot.org if it works "
+			       "for you. Thank you for your help!\n===\n");
+		}
+
+		found = 1;
+		break;
+	}
+
+	if (!found) {
+		fprintf(stderr, "Error: No supported 3COM NIC found.\n");
+		exit(1);
+	}
+
+	/*
+	 * The lowest 16 bytes of the I/O mapped register space of (most) 3COM
+	 * cards form a 'register window' into one of multiple (usually 8)
+	 * register banks. For 3C90xB/3C90xC we need register window/bank 0.
+	 */
+	OUTW(SELECT_REG_WINDOW + 0, io_base_addr + INT_STATUS);
+
+	return 0;
+}
+
+int nic3com_shutdown(void)
+{
+	return 0;
+}
+
+void *nic3com_map(const char *descr, unsigned long phys_addr, size_t len)
+{
+	return 0;
+}
+
+void nic3com_unmap(void *virt_addr, size_t len)
+{
+}
+
+void nic3com_chip_writeb(uint8_t val, volatile void *addr)
+{
+	OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
+	OUTB(val, io_base_addr + BIOS_ROM_DATA);
+}
+
+void nic3com_chip_writew(uint16_t val, volatile void *addr)
+{
+}
+
+void nic3com_chip_writel(uint32_t val, volatile void *addr)
+{
+}
+
+uint8_t nic3com_chip_readb(const volatile void *addr)
+{
+	uint8_t val;
+
+	OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
+	val = INB(io_base_addr + BIOS_ROM_DATA);
+
+	return val;
+}
+
+uint16_t nic3com_chip_readw(const volatile void *addr)
+{
+	return 0xffff;
+}
+
+uint32_t nic3com_chip_readl(const volatile void *addr)
+{
+	return 0xffffffff;
+}