Commit a5bcbceb authored by Carl-Daniel Hailfinger's avatar Carl-Daniel Hailfinger
Browse files

Rename programmer registration functions


Register_programmer suggests that we register a programmer. However,
that function registers a master for a given bus type, and a programmer
may support multiple masters (e.g. SPI, FWH). Rename a few other
functions to be more consistent.

Corresponding to flashrom svn r1831.
Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
parent 82b6ec1d
......@@ -61,7 +61,7 @@ static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr);
static uint8_t nic3com_chip_readb(const struct flashctx *flash,
const chipaddr addr);
static const struct par_programmer par_programmer_nic3com = {
static const struct par_master par_master_nic3com = {
.chip_readb = nic3com_chip_readb,
.chip_readw = fallback_chip_readw,
.chip_readl = fallback_chip_readl,
......@@ -124,7 +124,7 @@ int nic3com_init(void)
return 1;
max_rom_decode.parallel = 128 * 1024;
register_par_programmer(&par_programmer_nic3com, BUS_PARALLEL);
register_par_master(&par_master_nic3com, BUS_PARALLEL);
return 0;
}
......
......@@ -48,7 +48,7 @@ static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr);
static uint8_t nicintel_chip_readb(const struct flashctx *flash,
const chipaddr addr);
static const struct par_programmer par_programmer_nicintel = {
static const struct par_master par_master_nicintel = {
.chip_readb = nicintel_chip_readb,
.chip_readw = fallback_chip_readw,
.chip_readl = fallback_chip_readl,
......@@ -103,7 +103,7 @@ int nicintel_init(void)
pci_rmmio_writew(0x0001, nicintel_control_bar + CSR_FCR);
max_rom_decode.parallel = NICINTEL_MEMMAP_SIZE;
register_par_programmer(&par_programmer_nicintel, BUS_PARALLEL);
register_par_master(&par_master_nicintel, BUS_PARALLEL);
return 0;
}
......
......@@ -207,7 +207,7 @@ int nicintel_spi_init(void)
if (register_shutdown(nicintel_spi_shutdown, NULL))
return 1;
if (bitbang_spi_init(&bitbang_spi_master_nicintel))
if (register_spi_bitbang_master(&bitbang_spi_master_nicintel))
return 1;
return 0;
......
......@@ -42,7 +42,7 @@ static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr);
static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash,
const chipaddr addr);
static const struct par_programmer par_programmer_nicnatsemi = {
static const struct par_master par_master_nicnatsemi = {
.chip_readb = nicnatsemi_chip_readb,
.chip_readw = fallback_chip_readw,
.chip_readl = fallback_chip_readl,
......@@ -75,7 +75,7 @@ int nicnatsemi_init(void)
* functions below wants to be 0x0000FFFF.
*/
max_rom_decode.parallel = 131072;
register_par_programmer(&par_programmer_nicnatsemi, BUS_PARALLEL);
register_par_master(&par_master_nicnatsemi, BUS_PARALLEL);
return 0;
}
......
......@@ -41,7 +41,7 @@ const struct dev_entry nics_realtek[] = {
static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
static uint8_t nicrealtek_chip_readb(const struct flashctx *flash, const chipaddr addr);
static const struct par_programmer par_programmer_nicrealtek = {
static const struct par_master par_master_nicrealtek = {
.chip_readb = nicrealtek_chip_readb,
.chip_readw = fallback_chip_readw,
.chip_readl = fallback_chip_readl,
......@@ -90,7 +90,7 @@ int nicrealtek_init(void)
if (register_shutdown(nicrealtek_shutdown, NULL))
return 1;
register_par_programmer(&par_programmer_nicrealtek, BUS_PARALLEL);
register_par_master(&par_master_nicrealtek, BUS_PARALLEL);
return 0;
}
......
......@@ -140,7 +140,7 @@ int ogp_spi_init(void)
if (ogp_spibar == ERROR_PTR)
return 1;
if (bitbang_spi_init(&bitbang_spi_master_ogp))
if (register_spi_bitbang_master(&bitbang_spi_master_ogp))
return 1;
return 0;
......
/*
* This file is part of the flashrom project.
*
* Copyright (C) 2011 Carl-Daniel Hailfinger
* Copyright (C) 2011,2013,2014 Carl-Daniel Hailfinger
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -18,10 +18,10 @@
*/
/*
* Contains the opaque programmer framework.
* An opaque programmer is a programmer which does not provide direct access
* Contains the opaque master framework.
* An opaque master is a master which does not provide direct access
* to the flash chip and which abstracts all flash chip properties into a
* programmer specific interface.
* master specific interface.
*/
#include <stdint.h>
......@@ -32,35 +32,35 @@
int probe_opaque(struct flashctx *flash)
{
return flash->pgm->opaque.probe(flash);
return flash->mst->opaque.probe(flash);
}
int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
{
return flash->pgm->opaque.read(flash, buf, start, len);
return flash->mst->opaque.read(flash, buf, start, len);
}
int write_opaque(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
{
return flash->pgm->opaque.write(flash, buf, start, len);
return flash->mst->opaque.write(flash, buf, start, len);
}
int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
{
return flash->pgm->opaque.erase(flash, blockaddr, blocklen);
return flash->mst->opaque.erase(flash, blockaddr, blocklen);
}
int register_opaque_programmer(const struct opaque_programmer *pgm)
int register_opaque_master(const struct opaque_master *mst)
{
struct registered_programmer rpgm;
struct registered_master rmst;
if (!pgm->probe || !pgm->read || !pgm->write || !pgm->erase) {
msg_perr("%s called with incomplete programmer definition. "
if (!mst->probe || !mst->read || !mst->write || !mst->erase) {
msg_perr("%s called with incomplete master definition. "
"Please report a bug at flashrom@flashrom.org\n",
__func__);
return ERROR_FLASHROM_BUG;
}
rpgm.buses_supported = BUS_PROG;
rpgm.opaque = *pgm;
return register_programmer(&rpgm);
rmst.buses_supported = BUS_PROG;
rmst.opaque = *mst;
return register_master(&rmst);
}
......@@ -212,7 +212,7 @@ int pony_spi_init(void)
return 1;
}
if (bitbang_spi_init(&bitbang_spi_master_pony)) {
if (register_spi_bitbang_master(&bitbang_spi_master_pony)) {
return 1;
}
return 0;
......
......@@ -95,39 +95,39 @@ void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf,
return;
}
int register_par_programmer(const struct par_programmer *pgm,
int register_par_master(const struct par_master *mst,
const enum chipbustype buses)
{
struct registered_programmer rpgm;
if (!pgm->chip_writeb || !pgm->chip_writew || !pgm->chip_writel ||
!pgm->chip_writen || !pgm->chip_readb || !pgm->chip_readw ||
!pgm->chip_readl || !pgm->chip_readn) {
msg_perr("%s called with incomplete programmer definition. "
struct registered_master rmst;
if (!mst->chip_writeb || !mst->chip_writew || !mst->chip_writel ||
!mst->chip_writen || !mst->chip_readb || !mst->chip_readw ||
!mst->chip_readl || !mst->chip_readn) {
msg_perr("%s called with incomplete master definition. "
"Please report a bug at flashrom@flashrom.org\n",
__func__);
return ERROR_FLASHROM_BUG;
}
rpgm.buses_supported = buses;
rpgm.par = *pgm;
return register_programmer(&rpgm);
rmst.buses_supported = buses;
rmst.par = *mst;
return register_master(&rmst);
}
/* The limit of 4 is totally arbitrary. */
#define PROGRAMMERS_MAX 4
struct registered_programmer registered_programmers[PROGRAMMERS_MAX];
int registered_programmer_count = 0;
#define MASTERS_MAX 4
struct registered_master registered_masters[MASTERS_MAX];
int registered_master_count = 0;
/* This function copies the struct registered_programmer parameter. */
int register_programmer(struct registered_programmer *pgm)
/* This function copies the struct registered_master parameter. */
int register_master(struct registered_master *mst)
{
if (registered_programmer_count >= PROGRAMMERS_MAX) {
msg_perr("Tried to register more than %i programmer "
"interfaces.\n", PROGRAMMERS_MAX);
if (registered_master_count >= MASTERS_MAX) {
msg_perr("Tried to register more than %i master "
"interfaces.\n", MASTERS_MAX);
return ERROR_FLASHROM_LIMIT;
}
registered_programmers[registered_programmer_count] = *pgm;
registered_programmer_count++;
registered_masters[registered_master_count] = *mst;
registered_master_count++;
return 0;
}
......@@ -137,8 +137,8 @@ enum chipbustype get_buses_supported(void)
int i;
enum chipbustype ret = BUS_NONE;
for (i = 0; i < registered_programmer_count; i++)
ret |= registered_programmers[i].buses_supported;
for (i = 0; i < registered_master_count; i++)
ret |= registered_masters[i].buses_supported;
return ret;
}
......@@ -476,7 +476,7 @@ int pony_spi_init(void);
#endif
/* bitbang_spi.c */
int bitbang_spi_init(const struct bitbang_spi_master *master);
int register_spi_bitbang_master(const struct bitbang_spi_master *master);
/* buspirate_spi.c */
#if CONFIG_BUSPIRATE_SPI == 1
......@@ -552,7 +552,7 @@ enum spi_controller {
#define MAX_DATA_UNSPECIFIED 0
#define MAX_DATA_READ_UNLIMITED 64 * 1024
#define MAX_DATA_WRITE_UNLIMITED 256
struct spi_programmer {
struct spi_master {
enum spi_controller type;
unsigned int max_data_read;
unsigned int max_data_write;
......@@ -560,7 +560,7 @@ struct spi_programmer {
const unsigned char *writearr, unsigned char *readarr);
int (*multicommand)(struct flashctx *flash, struct spi_command *cmds);
/* Optimized functions for this programmer */
/* Optimized functions for this master */
int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
......@@ -573,7 +573,7 @@ int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cm
int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
int register_spi_programmer(const struct spi_programmer *programmer);
int register_spi_master(const struct spi_master *mst);
/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
enum ich_chipset {
......@@ -625,17 +625,17 @@ int wbsio_check_for_spi(void);
#endif
/* opaque.c */
struct opaque_programmer {
struct opaque_master {
int max_data_read;
int max_data_write;
/* Specific functions for this programmer */
/* Specific functions for this master */
int (*probe) (struct flashctx *flash);
int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
const void *data;
};
int register_opaque_programmer(const struct opaque_programmer *pgm);
int register_opaque_master(const struct opaque_master *mst);
/* programmer.c */
int noop_shutdown(void);
......@@ -648,7 +648,7 @@ void fallback_chip_writen(const struct flashctx *flash, const uint8_t *buf, chip
uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
struct par_programmer {
struct par_master {
void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
......@@ -659,18 +659,18 @@ struct par_programmer {
void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
const void *data;
};
int register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
struct registered_programmer {
int register_par_master(const struct par_master *mst, const enum chipbustype buses);
struct registered_master {
enum chipbustype buses_supported;
union {
struct par_programmer par;
struct spi_programmer spi;
struct opaque_programmer opaque;
struct par_master par;
struct spi_master spi;
struct opaque_master opaque;
};
};
extern struct registered_programmer registered_programmers[];
extern int registered_programmer_count;
int register_programmer(struct registered_programmer *pgm);
extern struct registered_master registered_masters[];
extern int registered_master_count;
int register_master(struct registered_master *mst);
/* serprog.c */
#if CONFIG_SERPROG == 1
......
......@@ -228,7 +228,7 @@ int rayer_spi_init(void)
if (pinout->preinit)
pinout->preinit(pinout);
if (bitbang_spi_init(&bitbang_spi_master_rayer))
if (register_spi_bitbang_master(&bitbang_spi_master_rayer))
return 1;
return 0;
......
......@@ -46,7 +46,7 @@ static void satamv_chip_writeb(const struct flashctx *flash, uint8_t val,
chipaddr addr);
static uint8_t satamv_chip_readb(const struct flashctx *flash,
const chipaddr addr);
static const struct par_programmer par_programmer_satamv = {
static const struct par_master par_master_satamv = {
.chip_readb = satamv_chip_readb,
.chip_readw = fallback_chip_readw,
.chip_readl = fallback_chip_readl,
......@@ -152,7 +152,7 @@ int satamv_init(void)
/* 512 kByte with two 8-bit latches, and
* 4 MByte with additional 3-bit latch. */
max_rom_decode.parallel = 4 * 1024 * 1024;
register_par_programmer(&par_programmer_satamv, BUS_PARALLEL);
register_par_master(&par_master_satamv, BUS_PARALLEL);
return 0;
}
......
......@@ -43,7 +43,7 @@ const struct dev_entry satas_sii[] = {
static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr addr);
static const struct par_programmer par_programmer_satasii = {
static const struct par_master par_master_satasii = {
.chip_readb = satasii_chip_readb,
.chip_readw = fallback_chip_readw,
.chip_readl = fallback_chip_readl,
......@@ -104,7 +104,7 @@ int satasii_init(void)
if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26))))
msg_pwarn("Warning: Flash seems unconnected.\n");
register_par_programmer(&par_programmer_satasii, BUS_PARALLEL);
register_par_master(&par_master_satasii, BUS_PARALLEL);
return 0;
}
......
......@@ -64,7 +64,7 @@ static int sb600_spi_send_command(struct flashctx *flash, unsigned int writecnt,
static int spi100_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
static struct spi_programmer spi_programmer_sb600 = {
static struct spi_master spi_master_sb600 = {
.type = SPI_CONTROLLER_SB600,
.max_data_read = FIFO_SIZE_OLD,
.max_data_write = FIFO_SIZE_OLD - 3,
......@@ -75,7 +75,7 @@ static struct spi_programmer spi_programmer_sb600 = {
.write_aai = default_spi_write_aai,
};
static struct spi_programmer spi_programmer_yangtze = {
static struct spi_master spi_master_yangtze = {
.type = SPI_CONTROLLER_YANGTZE,
.max_data_read = FIFO_SIZE_YANGTZE - 3, /* Apparently the big SPI 100 buffer is not a ring buffer. */
.max_data_write = FIFO_SIZE_YANGTZE - 3,
......@@ -184,14 +184,14 @@ static int compare_internal_fifo_pointer(uint8_t want)
/* Check the number of bytes to be transmitted and extract opcode. */
static int check_readwritecnt(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt)
{
unsigned int maxwritecnt = flash->pgm->spi.max_data_write + 3;
unsigned int maxwritecnt = flash->mst->spi.max_data_write + 3;
if (writecnt > maxwritecnt) {
msg_pinfo("%s: SPI controller can not send %d bytes, it is limited to %d bytes\n",
__func__, writecnt, maxwritecnt);
return SPI_INVALID_LENGTH;
}
unsigned int maxreadcnt = flash->pgm->spi.max_data_read + 3;
unsigned int maxreadcnt = flash->mst->spi.max_data_read + 3;
if (readcnt > maxreadcnt) {
msg_pinfo("%s: SPI controller can not receive %d bytes, it is limited to %d bytes\n",
__func__, readcnt, maxreadcnt);
......@@ -690,9 +690,9 @@ int sb600_probe_spi(struct pci_dev *dev)
/* Starting with Yangtze the SPI controller got a different interface with a much bigger buffer. */
if (amd_gen != CHIPSET_YANGTZE)
register_spi_programmer(&spi_programmer_sb600);
register_spi_master(&spi_master_sb600);
else
register_spi_programmer(&spi_programmer_yangtze);
register_spi_master(&spi_master_yangtze);
return 0;
}
......
......@@ -303,7 +303,7 @@ static int serprog_spi_send_command(struct flashctx *flash,
unsigned char *readarr);
static int serprog_spi_read(struct flashctx *flash, uint8_t *buf,
unsigned int start, unsigned int len);
static struct spi_programmer spi_programmer_serprog = {
static struct spi_master spi_master_serprog = {
.type = SPI_CONTROLLER_SERPROG,
.max_data_read = MAX_DATA_READ_UNLIMITED,
.max_data_write = MAX_DATA_WRITE_UNLIMITED,
......@@ -320,7 +320,7 @@ static uint8_t serprog_chip_readb(const struct flashctx *flash,
const chipaddr addr);
static void serprog_chip_readn(const struct flashctx *flash, uint8_t *buf,
const chipaddr addr, size_t len);
static const struct par_programmer par_programmer_serprog = {
static const struct par_master par_master_serprog = {
.chip_readb = serprog_chip_readb,
.chip_readw = fallback_chip_readw,
.chip_readl = fallback_chip_readl,
......@@ -489,7 +489,7 @@ int serprog_init(void)
v |= ((unsigned int)(rbuf[2]) << 16);
if (v == 0)
v = (1 << 24) - 1; /* SPI-op maximum. */
spi_programmer_serprog.max_data_write = v;
spi_master_serprog.max_data_write = v;
msg_pdbg(MSGHEADER "Maximum write-n length is %d\n", v);
}
if (!sp_docommand(S_CMD_Q_RDNMAXLEN, 0, NULL, 3, rbuf)) {
......@@ -499,7 +499,7 @@ int serprog_init(void)
v |= ((unsigned int)(rbuf[2]) << 16);
if (v == 0)
v = (1 << 24) - 1; /* SPI-op maximum. */
spi_programmer_serprog.max_data_read = v;
spi_master_serprog.max_data_read = v;
msg_pdbg(MSGHEADER "Maximum read-n length is %d\n", v);
}
spispeed = extract_programmer_param("spispeed");
......@@ -669,10 +669,9 @@ int serprog_init(void)
sp_streamed_transmit_bytes = 0;
sp_opbuf_usage = 0;
if (serprog_buses_supported & BUS_SPI)
register_spi_programmer(&spi_programmer_serprog);
register_spi_master(&spi_master_serprog);
if (serprog_buses_supported & BUS_NONSPI)
register_par_programmer(&par_programmer_serprog,
serprog_buses_supported & BUS_NONSPI);
register_par_master(&par_master_serprog, serprog_buses_supported & BUS_NONSPI);
return 0;
}
......@@ -932,7 +931,7 @@ static int serprog_spi_read(struct flashctx *flash, uint8_t *buf,
unsigned int start, unsigned int len)
{
unsigned int i, cur_len;
const unsigned int max_read = spi_programmer_serprog.max_data_read;
const unsigned int max_read = spi_master_serprog.max_data_read;
for (i = 0; i < len; i += cur_len) {
int ret;
cur_len = min(max_read, (len - i));
......
......@@ -34,13 +34,13 @@ int spi_send_command(struct flashctx *flash, unsigned int writecnt,
unsigned int readcnt, const unsigned char *writearr,
unsigned char *readarr)
{
return flash->pgm->spi.command(flash, writecnt, readcnt, writearr,
return flash->mst->spi.command(flash, writecnt, readcnt, writearr,
readarr);
}
int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds)
{
return flash->pgm->spi.multicommand(flash, cmds);
return flash->mst->spi.multicommand(flash, cmds);
}
int default_spi_send_command(struct flashctx *flash, unsigned int writecnt,
......@@ -78,7 +78,7 @@ int default_spi_send_multicommand(struct flashctx *flash,
int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
unsigned int len)
{
unsigned int max_data = flash->pgm->spi.max_data_read;
unsigned int max_data = flash->mst->spi.max_data_read;
if (max_data == MAX_DATA_UNSPECIFIED) {
msg_perr("%s called, but SPI read chunk size not defined "
"on this hardware. Please report a bug at "
......@@ -90,7 +90,7 @@ int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
{
unsigned int max_data = flash->pgm->spi.max_data_write;
unsigned int max_data = flash->mst->spi.max_data_write;
if (max_data == MAX_DATA_UNSPECIFIED) {
msg_perr("%s called, but SPI write chunk size not defined "
"on this hardware. Please report a bug at "
......@@ -124,7 +124,7 @@ int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
"access window.\n");
msg_perr("Read will probably return garbage.\n");
}
return flash->pgm->spi.read(flash, buf, addrbase + start, len);
return flash->mst->spi.read(flash, buf, addrbase + start, len);
}
/*
......@@ -136,17 +136,17 @@ int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
/* real chunksize is up to 256, logical chunksize is 256 */
int spi_chip_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
{
return flash->pgm->spi.write_256(flash, buf, start, len);
return flash->mst->spi.write_256(flash, buf, start, len);
}
/*
* Get the lowest allowed address for read accesses. This often happens to
* be the lowest allowed address for all commands which take an address.
* This is a programmer limitation.
* This is a master limitation.
*/
uint32_t spi_get_valid_read_addr(struct flashctx *flash)
{
switch (flash->pgm->spi.type) {
switch (flash->mst->spi.type) {
#if CONFIG_INTERNAL == 1
#if defined(__i386__) || defined(__x86_64__)
case SPI_CONTROLLER_ICH7:
......@@ -162,25 +162,25 @@ uint32_t spi_get_valid_read_addr(struct flashctx *flash)
int spi_aai_write(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
{
return flash->pgm->spi.write_aai(flash, buf, start, len);
return flash->mst->spi.write_aai(flash, buf, start, len);
}
int register_spi_programmer(const struct spi_programmer *pgm)
int register_spi_master(const struct spi_master *mst)
{
struct registered_programmer rpgm;
struct registered_master rmst;
if (!pgm->write_aai || !pgm->write_256 || !pgm->read || !pgm->command ||
!pgm->multicommand ||
((pgm->command == default_spi_send_command) &&
(pgm->multicommand == default_spi_send_multicommand))) {
msg_perr("%s called with incomplete programmer definition. "
if (!mst->write_aai || !mst->write_256 || !mst->read || !mst->command ||
!mst->multicommand ||
((mst->command == default_spi_send_command) &&
(mst->multicommand == default_spi_send_multicommand))) {
msg_perr("%s called with incomplete master definition. "
"Please report a bug at flashrom@flashrom.org\n",
__func__);
return ERROR_FLASHROM_BUG;
}
rpgm.buses_supported = BUS_SPI;
rpgm.spi = *pgm;
return register_programmer(&rpgm);
rmst.buses_supported = BUS_SPI;
rmst.spi = *mst;
return register_master(&rmst);
}
......@@ -172,7 +172,7 @@ int probe_spi_rdid4(struct flashctx *flash)
/* Some SPI controllers do not support commands with writecnt=1 and
* readcnt=4.
*/
switch (flash->pgm->spi.type) {
switch (flash->mst->spi.type) {
#if CONFIG_INTERNAL == 1
#if defined(__i386__) || defined(__x86_64__)
case SPI_CONTROLLER_IT87XX:
......@@ -1079,7 +1079,7 @@ int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned i
.readarr = NULL,
}};
switch (flash->pgm->spi.type) {
switch (flash->mst->spi.type) {
#if CONFIG_INTERNAL == 1
#if defined(__i386__) || defined(__x86_64__)
case SPI_CONTROLLER_IT87XX:
......
......@@ -55,7 +55,7 @@ const struct dev_entry devs_usbblasterspi[] = {
{}
};
static const struct spi_programmer spi_programmer_usbblaster;
static const struct spi_master spi_master_usbblaster;
static struct ftdi_context ftdic;
......@@ -117,7 +117,7 @@ int usbblaster_spi_init(void)
return -1;
}
register_spi_programmer(&spi_programmer_usbblaster);
register_spi_master(&spi_master_usbblaster);
return 0;
}
......@@ -211,7 +211,7 @@ static int usbblaster_spi_send_command(struct flashctx *flash, unsigned int writ
}
static const struct spi_programmer spi_programmer_usbblaster = {
static const struct spi_master spi_master_usbblaster = {
.type = SPI_CONTROLLER_USBBLASTER,
.max_data_read = 256,
.max_data_write = 256,
......
......@@ -68,7 +68,7 @@ static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt,
static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf,
unsigned int start, unsigned int len);
static const struct spi_programmer spi_programmer_wbsio = {
static const struct spi_master spi_master_wbsio = {
.type = SPI_CONTROLLER_WBSIO,
.max_data_read = MAX_DATA_UNSPECIFIED,
.max_data_write = MAX_DATA_UNSPECIFIED,
......@@ -90,7 +90,7 @@ int wbsio_check_for_spi(void)
msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is "
"1024 kB!\n", __func__);
max_rom_decode.spi = 1024 * 1024;
register_spi_programmer(&spi_programmer_wbsio);
register_spi_master(&spi_master_wbsio);
return 0;
}
......
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