Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
P
pythondata-peripheral-simplepwm
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
Analytics
Analytics
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Commits
Issue Boards
Open sidebar
Kestrel Collaboration
Kestrel LiteX
pythondata-peripheral-simplepwm
Commits
3ee21c89
Commit
3ee21c89
authored
May 18, 2022
by
Raptor Engineering Development Team
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Fix tachometer operation
Verified on Arctic Tern card
parent
496bdca5
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
6 additions
and
6 deletions
+6
-6
pythondata_peripheral_simplepwm/rtl/simple_pwm.v
pythondata_peripheral_simplepwm/rtl/simple_pwm.v
+6
-6
No files found.
pythondata_peripheral_simplepwm/rtl/simple_pwm.v
View file @
3ee21c89
...
...
@@ -210,9 +210,9 @@ module simple_pwm_wishbone #(
.
tach_in
(
tach4_in
)
);
assign
status_reg1
[
15
:
8
]
=
tach1_count
;
assign
status_reg1
[
15
:
0
]
=
tach1_count
;
assign
status_reg1
[
31
:
16
]
=
tach2_count
;
assign
status_reg2
[
15
:
8
]
=
tach3_count
;
assign
status_reg2
[
15
:
0
]
=
tach3_count
;
assign
status_reg2
[
31
:
16
]
=
tach4_count
;
endmodule
...
...
@@ -236,7 +236,7 @@ module simple_pwm #(
reg
pwm_out_reg
=
0
;
assign
pwm_out
=
pwm_out_reg
;
reg
[
PWM_CTL
_BITS
-
1
:
0
]
tach_count_reg
=
0
;
reg
[
TACH_COUNT
_BITS
-
1
:
0
]
tach_count_reg
=
0
;
assign
tach_count
=
tach_count_reg
;
reg
[
PWM_CTL_BITS
-
1
:
0
]
pwm_counter
=
0
;
...
...
@@ -244,8 +244,8 @@ module simple_pwm #(
reg
tach_in_prev
=
0
;
reg
tach_in_reg
=
0
;
reg
[
15
:
0
]
pwm_clock_div_counter
;
reg
[
23
:
0
]
tach_clock_div_counter
;
reg
[
15
:
0
]
pwm_clock_div_counter
=
0
;
reg
[
31
:
0
]
tach_clock_div_counter
=
0
;
always
@
(
posedge
base_clock
)
begin
if
(
pwm_clock_div_counter
>
((
BASE_CLOCK_FREQUENCY_KHZ
/
REQUIRED_PWM_FREQUENCY_KHZ
)
/
(
2
**
PWM_CTL_BITS
)))
begin
...
...
@@ -263,7 +263,7 @@ module simple_pwm #(
end
always
@
(
posedge
base_clock
)
begin
if
(
tach_clock_div_counter
>
(
BASE_CLOCK_FREQUENCY_KHZ
/
TACHOMETER_SAMPLE_RATE_HZ
))
begin
if
(
tach_clock_div_counter
>
(
(
BASE_CLOCK_FREQUENCY_KHZ
*
1000
)
/
TACHOMETER_SAMPLE_RATE_HZ
))
begin
tach_count_reg
<=
tach_counter
;
tach_counter
<=
0
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment