Commit d1c52523 authored by Sebastien Bourdeauducq's avatar Sebastien Bourdeauducq
Browse files

kc705: automatic Ethernet TX clock constraint

parent a3616119
...@@ -502,6 +502,10 @@ class Platform(XilinxPlatform): ...@@ -502,6 +502,10 @@ class Platform(XilinxPlatform):
self.add_period_constraint(self.lookup_request("eth_clocks").rx, 8.0) self.add_period_constraint(self.lookup_request("eth_clocks").rx, 8.0)
except ConstraintError: except ConstraintError:
pass pass
try:
self.add_period_constraint(self.lookup_request("eth_clocks").tx, 8.0)
except ConstraintError:
pass
if isinstance(self.toolchain, XilinxISEToolchain): if isinstance(self.toolchain, XilinxISEToolchain):
self.add_platform_command("CONFIG DCI_CASCADE = \"33 32 34\";") self.add_platform_command("CONFIG DCI_CASCADE = \"33 32 34\";")
else: else:
......
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