Commit b0c5b74c authored by Sebastien Bourdeauducq's avatar Sebastien Bourdeauducq
Browse files

verilog: handle default in case statements

parent 512655c1
...@@ -65,6 +65,10 @@ def _printnode(ns, level, comb, node): ...@@ -65,6 +65,10 @@ def _printnode(ns, level, comb, node):
r += "\t"*(level + 1) + _printexpr(ns, case[0]) + ": begin\n" r += "\t"*(level + 1) + _printexpr(ns, case[0]) + ": begin\n"
r += _printnode(ns, level + 2, comb, case[1]) r += _printnode(ns, level + 2, comb, case[1])
r += "\t"*(level + 1) + "end\n" r += "\t"*(level + 1) + "end\n"
if node.default.l:
r += "\t"*(level + 1) + "default: begin\n"
r += _printnode(ns, level + 2, comb, node.default)
r += "\t"*(level + 1) + "end\n"
r += "\t"*level + "endcase\n" r += "\t"*level + "endcase\n"
return r return r
else: else:
......
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