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Kestrel Collaboration
Kestrel LiteX
migen
Commits
973c0093
Commit
973c0093
authored
12 years ago
by
Sebastien Bourdeauducq
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Reorganize examples folder
parent
8a234512
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15
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15 changed files
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10 additions
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5 deletions
+10
-5
doc/index.rst
doc/index.rst
+10
-5
examples/basic/fsm.py
examples/basic/fsm.py
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-0
examples/basic/lm32_inst.py
examples/basic/lm32_inst.py
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examples/basic/memory.py
examples/basic/memory.py
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examples/basic/simple_gpio.py
examples/basic/simple_gpio.py
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examples/basic/two_dividers.py
examples/basic/two_dividers.py
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examples/basic/using_record.py
examples/basic/using_record.py
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examples/dataflow/arithmetic.py
examples/dataflow/arithmetic.py
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examples/dataflow/dma.py
examples/dataflow/dma.py
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-0
examples/sim/abstract_transactions.py
examples/sim/abstract_transactions.py
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examples/sim/basic1.py
examples/sim/basic1.py
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examples/sim/basic2.py
examples/sim/basic2.py
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examples/sim/dataflow.py
examples/sim/dataflow.py
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examples/sim/fir.py
examples/sim/fir.py
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examples/sim/memory.py
examples/sim/memory.py
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doc/index.rst
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973c0093
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@@ -572,25 +572,30 @@ Simulation examples
...
@@ -572,25 +572,30 @@ Simulation examples
Most basic
Most basic
==========
==========
.. include:: ../examples/basic
_sim
.py
.. include:: ../examples/
sim/
basic
1
.py
:code: python
:code: python
A few more features
A few more features
===================
===================
.. include:: ../examples/basic2
_sim
.py
.. include:: ../examples/
sim/
basic2.py
:code: python
:code: python
Memory access
Memory access
=============
=============
.. include:: ../examples/memory
_sim
.py
.. include:: ../examples/
sim/
memory.py
:code: python
:code: python
A FIR filter
A FIR filter
============
============
.. include:: ../examples/fir.py
.. include:: ../examples/
sim/
fir.py
:code: python
:code: python
Abstract bus transactions
Abstract bus transactions
=========================
=========================
.. include:: ../examples/abstract_transactions.py
.. include:: ../examples/sim/abstract_transactions.py
:code: python
Dataflow simulation actors
==========================
.. include:: ../examples/sim/dataflow.py
:code: python
:code: python
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examples/fsm.py
→
examples/
basic/
fsm.py
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examples/lm32_inst.py
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examples/
basic/
lm32_inst.py
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examples/memory.py
→
examples/
basic/
memory.py
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973c0093
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examples/simple_gpio.py
→
examples/
basic/
simple_gpio.py
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examples/
corelogic_conv
.py
→
examples/
basic/two_dividers
.py
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examples/using_record.py
→
examples/
basic/
using_record.py
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examples/dataflow.py
→
examples/dataflow
/arithmetic
.py
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examples/dataflow
_
dma.py
→
examples/dataflow
/
dma.py
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examples/abstract_transactions.py
→
examples/
sim/
abstract_transactions.py
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examples/basic
_sim
.py
→
examples/
sim/
basic
1
.py
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examples/basic2
_sim
.py
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examples/
sim/
basic2.py
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examples/dataflow
_sim
.py
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examples/
sim/
dataflow.py
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examples/fir.py
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examples/
sim/
fir.py
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examples/memory
_sim
.py
→
examples/
sim/
memory.py
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