Commit eb8a4840 authored by Florent Kermarrec's avatar Florent Kermarrec

targets/de10nano: fix typo.

parent 2cef54a9
...@@ -76,6 +76,7 @@ class BaseSoC(SoCCore): ...@@ -76,6 +76,7 @@ class BaseSoC(SoCCore):
# SDR SDRAM -------------------------------------------------------------------------------- # SDR SDRAM --------------------------------------------------------------------------------
if with_mister_sdram and not self.integrated_main_ram_size: if with_mister_sdram and not self.integrated_main_ram_size:
sdrphy_cls = HalfRateGENSDRPHY if sdram_rate == "1:2" else GENSDRPHY sdrphy_cls = HalfRateGENSDRPHY if sdram_rate == "1:2" else GENSDRPHY
self.submodules.sdrphy = sdrphy_cls(platform.request("sdram"))
self.add_sdram("sdram", self.add_sdram("sdram",
phy = self.sdrphy, phy = self.sdrphy,
module = AS4C32M16(sys_clk_freq, sdram_rate), module = AS4C32M16(sys_clk_freq, sdram_rate),
......
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