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Kestrel Collaboration
Kestrel LiteX
litex-boards
Commits
851378f0
Commit
851378f0
authored
Jul 17, 2020
by
Florent Kermarrec
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platforms/trellisboard: move ddram_vtt_en.
parent
165f9eac
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litex_boards/platforms/trellisboard.py
litex_boards/platforms/trellisboard.py
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litex_boards/platforms/trellisboard.py
View file @
851378f0
...
...
@@ -53,6 +53,7 @@ _io = [
Subsignal
(
"siwu_n"
,
Pins
(
"AJ28"
),
IOStandard
(
"LVCMOS33"
)),
),
(
"dram_vtt_en"
,
0
,
Pins
(
"E25"
),
IOStandard
(
"LVCMOS33"
)),
(
"ddram"
,
0
,
Subsignal
(
"a"
,
Pins
(
"E30 F28 C32 E29 F32 D30 E32 D29"
,
...
...
@@ -81,8 +82,6 @@ _io = [
Misc
(
"SLEWRATE=FAST"
),
),
(
"dram_vtt_en"
,
0
,
Pins
(
"E25"
),
IOStandard
(
"LVCMOS33"
)),
(
"eth_clocks"
,
0
,
Subsignal
(
"tx"
,
Pins
(
"A15"
)),
Subsignal
(
"rx"
,
Pins
(
"C17"
)),
...
...
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