diff --git a/litex_boards/targets/alveo_u250.py b/litex_boards/targets/alveo_u250.py
index daed9e02b3863a45c0c5618063a1b78fe05395fd..a4a07dfee5edb0e20a38593a901e12b8773ac618 100755
--- a/litex_boards/targets/alveo_u250.py
+++ b/litex_boards/targets/alveo_u250.py
@@ -52,7 +52,6 @@ class _CRG(Module):
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys.clk),
             Instance("BUFGCE", name="main_bufgce",
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys4x.clk),
-            AsyncResetSynchronizer(self.cd_idelay, ~pll.locked),
         ]
 
         self.submodules.idelayctrl = USIDELAYCTRL(cd_ref=self.cd_idelay, cd_sys=self.cd_sys)
diff --git a/litex_boards/targets/alveo_u280.py b/litex_boards/targets/alveo_u280.py
index daccffe7bcb2a0ba20d11bdcaba20137b5e9499c..da230fb24697d1751ae05bf20e39a5e48c4c08a1 100755
--- a/litex_boards/targets/alveo_u280.py
+++ b/litex_boards/targets/alveo_u280.py
@@ -51,7 +51,6 @@ class _CRG(Module):
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys.clk),
             Instance("BUFGCE", name="main_bufgce",
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys4x.clk),
-            AsyncResetSynchronizer(self.cd_idelay, ~pll.locked),
         ]
 
         self.submodules.idelayctrl = USIDELAYCTRL(cd_ref=self.cd_idelay, cd_sys=self.cd_sys)
diff --git a/litex_boards/targets/kcu105.py b/litex_boards/targets/kcu105.py
index 8bd6a7badab8b82e528aa3b21bd79c355f92201c..ed383a66e387334051f5f9f6539eeb3d911c7f1c 100755
--- a/litex_boards/targets/kcu105.py
+++ b/litex_boards/targets/kcu105.py
@@ -55,7 +55,6 @@ class _CRG(Module):
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys.clk),
             Instance("BUFGCE", name="main_bufgce",
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys4x.clk),
-            AsyncResetSynchronizer(self.cd_idelay, ~pll.locked),
         ]
 
         self.submodules.idelayctrl = USIDELAYCTRL(cd_ref=self.cd_idelay, cd_sys=self.cd_sys)
diff --git a/litex_boards/targets/mercury_xu5.py b/litex_boards/targets/mercury_xu5.py
index 95624fb5763eaeccd3f36238d33e21119e5853c0..6317ac1b93ac267fbfa6d2e4163838a291307859 100755
--- a/litex_boards/targets/mercury_xu5.py
+++ b/litex_boards/targets/mercury_xu5.py
@@ -48,7 +48,6 @@ class _CRG(Module):
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys.clk),
             Instance("BUFGCE", name="main_bufgce",
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys4x.clk),
-            AsyncResetSynchronizer(self.cd_idelay, ~pll.locked),
         ]
 
         self.submodules.idelayctrl = USIDELAYCTRL(cd_ref=self.cd_idelay, cd_sys=self.cd_sys)
diff --git a/litex_boards/targets/vcu118.py b/litex_boards/targets/vcu118.py
index 343aed4c316ee5e6dcda1fd841237941dde1c04f..8c3819d33cb7cd8bc5a98e09740612e12025a05e 100755
--- a/litex_boards/targets/vcu118.py
+++ b/litex_boards/targets/vcu118.py
@@ -49,7 +49,6 @@ class _CRG(Module):
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys.clk),
             Instance("BUFGCE", name="main_bufgce",
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys4x.clk),
-            AsyncResetSynchronizer(self.cd_idelay, ~pll.locked),
         ]
 
         self.submodules.idelayctrl = USIDELAYCTRL(cd_ref=self.cd_idelay, cd_sys=self.cd_sys)
diff --git a/litex_boards/targets/xcu1525.py b/litex_boards/targets/xcu1525.py
index a200f2263be7514e05ce1430003f31eb15b177c3..4fcb1b99cf6ff9a6db671df3b99e1ca8620df317 100755
--- a/litex_boards/targets/xcu1525.py
+++ b/litex_boards/targets/xcu1525.py
@@ -51,7 +51,6 @@ class _CRG(Module):
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys.clk),
             Instance("BUFGCE", name="main_bufgce",
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys4x.clk),
-            AsyncResetSynchronizer(self.cd_idelay, ~pll.locked),
         ]
 
         self.submodules.idelayctrl = USPIDELAYCTRL(cd_ref=self.cd_idelay, cd_sys=self.cd_sys)
diff --git a/litex_boards/targets/zcu104.py b/litex_boards/targets/zcu104.py
index 05b9ef89c1fc99efa53c1911224419ac5ed33b9b..a45d90cfeacbe88dc31932f2ff23e560038fd171 100755
--- a/litex_boards/targets/zcu104.py
+++ b/litex_boards/targets/zcu104.py
@@ -50,7 +50,6 @@ class _CRG(Module):
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys.clk),
             Instance("BUFGCE", name="main_bufgce",
                 i_CE=1, i_I=self.cd_pll4x.clk, o_O=self.cd_sys4x.clk),
-            AsyncResetSynchronizer(self.cd_idelay, ~pll.locked),
         ]
 
         self.submodules.idelayctrl = USIDELAYCTRL(cd_ref=self.cd_idelay, cd_sys=self.cd_sys)