Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
L
litex-boards
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
1
Merge Requests
1
Analytics
Analytics
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Commits
Issue Boards
Open sidebar
Kestrel Collaboration
Kestrel LiteX
litex-boards
Commits
4bec17e1
Commit
4bec17e1
authored
Jan 05, 2021
by
Hans Baier
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
colorlight: Add option for etherbone ip address
parent
016d7551
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
13 additions
and
12 deletions
+13
-12
litex_boards/targets/colorlight_5a_75x.py
litex_boards/targets/colorlight_5a_75x.py
+13
-12
No files found.
litex_boards/targets/colorlight_5a_75x.py
View file @
4bec17e1
...
...
@@ -119,7 +119,7 @@ class _CRG(Module):
# BaseSoC ------------------------------------------------------------------------------------------
class
BaseSoC
(
SoCCore
):
def
__init__
(
self
,
board
,
revision
,
sys_clk_freq
=
60e6
,
with_ethernet
=
False
,
with_etherbone
=
False
,
eth_phy
=
0
,
use_internal_osc
=
False
,
sdram_rate
=
"1:1"
,
**
kwargs
):
def
__init__
(
self
,
board
,
revision
,
sys_clk_freq
=
60e6
,
with_ethernet
=
False
,
with_etherbone
=
False
,
eth
erbone_ip
=
"192.168.1.50"
,
eth
_phy
=
0
,
use_internal_osc
=
False
,
sdram_rate
=
"1:1"
,
**
kwargs
):
board
=
board
.
lower
()
assert
board
in
[
"5a-75b"
,
"5a-75e"
]
if
board
==
"5a-75b"
:
...
...
@@ -171,7 +171,7 @@ class BaseSoC(SoCCore):
if
with_ethernet
:
self
.
add_ethernet
(
phy
=
self
.
ethphy
)
if
with_etherbone
:
self
.
add_etherbone
(
phy
=
self
.
ethphy
)
self
.
add_etherbone
(
phy
=
self
.
ethphy
,
ip_address
=
etherbone_ip
)
# Leds -------------------------------------------------------------------------------------
self
.
submodules
.
leds
=
LedChaser
(
...
...
@@ -183,16 +183,17 @@ class BaseSoC(SoCCore):
def
main
():
parser
=
argparse
.
ArgumentParser
(
description
=
"LiteX SoC on Colorlight 5A-75X"
)
parser
.
add_argument
(
"--build"
,
action
=
"store_true"
,
help
=
"Build bitstream"
)
parser
.
add_argument
(
"--load"
,
action
=
"store_true"
,
help
=
"Load bitstream"
)
parser
.
add_argument
(
"--board"
,
default
=
"5a-75b"
,
help
=
"Board type: 5a-75b (default) or 5a-75e"
)
parser
.
add_argument
(
"--revision"
,
default
=
"7.0"
,
type
=
str
,
help
=
"Board revision: 7.0 (default), 6.0 or 6.1"
)
parser
.
add_argument
(
"--sys-clk-freq"
,
default
=
60e6
,
help
=
"System clock frequency (default: 60MHz)"
)
parser
.
add_argument
(
"--with-ethernet"
,
action
=
"store_true"
,
help
=
"Enable Ethernet support"
)
parser
.
add_argument
(
"--with-etherbone"
,
action
=
"store_true"
,
help
=
"Enable Etherbone support"
)
parser
.
add_argument
(
"--eth-phy"
,
default
=
0
,
type
=
int
,
help
=
"Ethernet PHY: 0 (default) or 1"
)
parser
.
add_argument
(
"--use-internal-osc"
,
action
=
"store_true"
,
help
=
"Use internal oscillator"
)
parser
.
add_argument
(
"--sdram-rate"
,
default
=
"1:1"
,
help
=
"SDRAM Rate: 1:1 Full Rate (default), 1:2 Half Rate"
)
parser
.
add_argument
(
"--build"
,
action
=
"store_true"
,
help
=
"Build bitstream"
)
parser
.
add_argument
(
"--load"
,
action
=
"store_true"
,
help
=
"Load bitstream"
)
parser
.
add_argument
(
"--board"
,
default
=
"5a-75b"
,
help
=
"Board type: 5a-75b (default) or 5a-75e"
)
parser
.
add_argument
(
"--revision"
,
default
=
"7.0"
,
type
=
str
,
help
=
"Board revision: 7.0 (default), 6.0 or 6.1"
)
parser
.
add_argument
(
"--sys-clk-freq"
,
default
=
60e6
,
help
=
"System clock frequency (default: 60MHz)"
)
parser
.
add_argument
(
"--with-ethernet"
,
action
=
"store_true"
,
help
=
"Enable Ethernet support"
)
parser
.
add_argument
(
"--with-etherbone"
,
action
=
"store_true"
,
help
=
"Enable Etherbone support"
)
parser
.
add_argument
(
"--etherbone-ip"
,
default
=
"192.168.1.50"
,
type
=
str
,
help
=
"etherbone IP address"
)
parser
.
add_argument
(
"--eth-phy"
,
default
=
0
,
type
=
int
,
help
=
"Ethernet PHY: 0 (default) or 1"
)
parser
.
add_argument
(
"--use-internal-osc"
,
action
=
"store_true"
,
help
=
"Use internal oscillator"
)
parser
.
add_argument
(
"--sdram-rate"
,
default
=
"1:1"
,
help
=
"SDRAM Rate: 1:1 Full Rate (default), 1:2 Half Rate"
)
builder_args
(
parser
)
soc_core_args
(
parser
)
trellis_args
(
parser
)
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment