Enable IRQs on GPIO2

parent 9cd44ef2
......@@ -113,6 +113,7 @@ class BaseSoC(SoCCore):
mem_map.update(SoCCore.mem_map)
interrupt_map = {
"gpio2" : 1,
"ethmac" : 2,
"hostlpcslave" : 3,
"openfsimaster" : 4,
......@@ -339,7 +340,8 @@ class BaseSoC(SoCCore):
from litex.soc.cores.gpio import GPIOIn
self.submodules.gpio2 = GPIOIn(
pads = Cat(*[platform.request("user_dip_btn", i) for i in range(8)]))
pads = Cat(*[platform.request("user_dip_btn", i) for i in range(8)]),
with_irq = True)
self.add_csr("gpio2")
# Alphanumeric display -----------------------------------------------------------------------------
......
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