Update README to better reflect current project status

README.md

@@ -122,27 +122,7 @@ If you've wired everything up correctly, and depending on exactly how your host
             VCS 0: Placing device in AVSBus voltage command mode
             VDN 0: Placing device in AVSBus voltage command mode
             AVSBus PMBUS functionality enabled!
-    initialize_fsi_master(): after setup: ctl 0x00031400, sta 0x10000000
     Starting IPL on side 0
-    access_fsi_mem(): address 0x000800, data: 0xa0ff0800 sta: 0x41000001
-    access_fsi_mem(): address 0x000900, data: 0x00000001 sta: 0x41000001
-    access_fsi_mem(): address 0x000900, data: 0x00000001 sta: 0x41000001
-    access_fsi_mem(): address 0x000900, data: 0x00000001 sta: 0x41000001
-    access_fsi_mem(): address 0x002824, data: 0x00000000 sta: 0x41000001
-    access_fsi_mem(): address 0x000808, data: 0x02040000 sta: 0x41000001
-    access_fsi_mem(): address 0x000814, data: 0x04000510 sta: 0x41000001
-    access_fsi_mem(): address 0x000808, data: 0x02040000 sta: 0x41000001
-    access_fsi_mem(): address 0x000900, data: 0x00000001 sta: 0x41000001
-    access_fsi_mem(): address 0x002c60, data: 0xeeeef304 sta: 0x41000001
-    access_fsi_mem(): address 0x002c60, data: 0xeeeef30c sta: 0x41000001
-    access_fsi_mem(): address 0x000870, data: 0x20000000 sta: 0x41000001
-    access_fsi_mem(): address 0x001034, data: 0x60000000 sta: 0x41000001
-    access_fsi_mem(): address 0x00102c, data: 0xffffffff sta: 0x41000001
-    access_fsi_mem(): address 0x002820, data: 0x00000000 sta: 0x41000001
-    access_fsi_mem(): address 0x002820, data: 0x00000000 sta: 0x41000001
-    access_fsi_mem(): address 0x002804, data: 0x04c04000 sta: 0x41000001
-    access_fsi_mem(): address 0x002804, data: 0x04c04000 sta: 0x41000001
-    access_fsi_mem(): address 0x002804, data: 0x84c04000 sta: 0x41000001
 
     --== Welcome to SBE - CommitId[0x9cc77bc5] ==--
     SBE starting hostboot
@@ -155,13 +135,12 @@ Note the FSI start sequence is the last task to run after main platform setup an
 
 ## Known Issues
 
-- Many IPMI commands are unimplemented in this initial release, causing the OCCs to fail to come online [^2] [^3].  These commands will be implemented over the coming weeks and months.
 - NextPNR continues to indicate timing failure even though the design operates as intended.  This needs to be investigated and resolved.
-- Microwatt is consuming around half of the entire FPGA on the Versa ECP5 -45 devices.  This is due to issues within GHDL/Yosys/NextPNR, apparently triggered by the Microwatt codebase, that need to be investigated and resolved.
+- Microwatt/LiteX is consuming around half of the entire FPGA on the Versa ECP5 -45 devices.  This is due to issues within GHDL/Yosys/NextPNR, apparently triggered by the Microwatt/LiteX codebase, that need to be investigated and resolved.
 
 ## Future Direction
 
-Kestrel is an active development project at Raptor Engineering, and as such features will continue to be implemented over time.  Our current focus is the remaining IPMI commands, followed by Microwatt size reduction in an effort to (re)enable Ethernet support.  Linux is also on our roadmap, although timing is currently unknown due to the aforementioned blocking factors.
+Kestrel is an active development project at Raptor Engineering, and as such features will continue to be implemented over time.  Our current focus is adding functionality to the Zephyr firmware.  Linux is also on our roadmap, although timing is currently unknown due to the aforementioned blocking factors.
 
 Kestrel is intended to be used on an upcoming Raptor Computing Systems product incorporating a much larger ECP5 FPGA.  This product is not a standard PC form factor device, nor will it be a cost focused product, but it is designed partly as a development platform for Kestrel technologies.  Look for more information on this specialty product later in 2021!