Apply Kestrel changes to latest LiteX boards upstream tree

parent ef662035
...@@ -3,6 +3,7 @@ ...@@ -3,6 +3,7 @@
# #
# Copyright (c) 2017 Sergiusz Bazanski <q3k@q3k.org> # Copyright (c) 2017 Sergiusz Bazanski <q3k@q3k.org>
# Copyright (c) 2018-2019 Florent Kermarrec <florent@enjoy-digital.fr> # Copyright (c) 2018-2019 Florent Kermarrec <florent@enjoy-digital.fr>
# Copyright (c) 2020-2021 Raptor Engineering, LLC
# SPDX-License-Identifier: BSD-2-Clause # SPDX-License-Identifier: BSD-2-Clause
from litex.build.generic_platform import * from litex.build.generic_platform import *
...@@ -25,6 +26,7 @@ _io = [ ...@@ -25,6 +26,7 @@ _io = [
("user_led", 5, Pins("F18"), IOStandard("LVCMOS25")), ("user_led", 5, Pins("F18"), IOStandard("LVCMOS25")),
("user_led", 6, Pins("E17"), IOStandard("LVCMOS25")), ("user_led", 6, Pins("E17"), IOStandard("LVCMOS25")),
("user_led", 7, Pins("F16"), IOStandard("LVCMOS25")), ("user_led", 7, Pins("F16"), IOStandard("LVCMOS25")),
("user_leds", 0, Pins("E16 D17 D18 E18 F17 F18 E17 F16"), IOStandard("LVCMOS25")),
# Switches # Switches
("user_dip_btn", 0, Pins("H2"), IOStandard("LVCMOS15")), ("user_dip_btn", 0, Pins("H2"), IOStandard("LVCMOS15")),
...@@ -36,6 +38,25 @@ _io = [ ...@@ -36,6 +38,25 @@ _io = [
("user_dip_btn", 6, Pins("K19"), IOStandard("LVCMOS25")), ("user_dip_btn", 6, Pins("K19"), IOStandard("LVCMOS25")),
("user_dip_btn", 7, Pins("K20"), IOStandard("LVCMOS25")), ("user_dip_btn", 7, Pins("K20"), IOStandard("LVCMOS25")),
# Alphanumeric display
("alpha_led", 0, Pins("M20"), IOStandard("LVCMOS25")),
("alpha_led", 1, Pins("L18"), IOStandard("LVCMOS25")),
("alpha_led", 2, Pins("M19"), IOStandard("LVCMOS25")),
("alpha_led", 3, Pins("L16"), IOStandard("LVCMOS25")),
("alpha_led", 4, Pins("L17"), IOStandard("LVCMOS25")),
("alpha_led", 5, Pins("M18"), IOStandard("LVCMOS25")),
("alpha_led", 6, Pins("N16"), IOStandard("LVCMOS25")),
("alpha_led", 7, Pins("M17"), IOStandard("LVCMOS25")),
("alpha_led", 8, Pins("N18"), IOStandard("LVCMOS25")),
("alpha_led", 9, Pins("P17"), IOStandard("LVCMOS25")),
("alpha_led", 10, Pins("N17"), IOStandard("LVCMOS25")),
("alpha_led", 11, Pins("P16"), IOStandard("LVCMOS25")),
("alpha_led", 12, Pins("R16"), IOStandard("LVCMOS25")),
("alpha_led", 13, Pins("R17"), IOStandard("LVCMOS25")),
("alpha_led", 14, Pins("U1"), IOStandard("LVCMOS25")),
("alpha_led", 15, Pins("T16"), IOStandard("LVCMOS25")), # Not wired on Versa board, but makes GPIO bank 16 bits. Future expansion?
("alpha_leds", 0, Pins("M20 L18 M19 L16 L17 M18 N16 M17 N18 P17 N17 P16 R16 R17 U1 T16"), IOStandard("LVCMOS25")), # T16 not wired on Versa board, but makes GPIO bank 16 bits. Future expansion?
# Serial # Serial
("serial", 0, ("serial", 0,
Subsignal("rx", Pins("C11"), IOStandard("LVCMOS33")), Subsignal("rx", Pins("C11"), IOStandard("LVCMOS33")),
...@@ -156,6 +177,68 @@ _io = [ ...@@ -156,6 +177,68 @@ _io = [
Subsignal("p", Pins("Y7")), Subsignal("p", Pins("Y7")),
Subsignal("n", Pins("Y8")), Subsignal("n", Pins("Y8")),
), ),
("i2c_bus1_master", 0,
Subsignal("sda", Pins("D12"), IOStandard("LVCMOS33"), Misc("PULLMODE=UP")),
Subsignal("scl", Pins("B10"), IOStandard("LVCMOS33"), Misc("PULLMODE=UP")),
),
("i2c_bus2_master", 0,
Subsignal("sda", Pins("C10"), IOStandard("LVCMOS33"), Misc("PULLMODE=UP")),
Subsignal("scl", Pins("A9"), IOStandard("LVCMOS33"), Misc("PULLMODE=UP")),
),
("i2c_bus3_master", 0,
Subsignal("sda", Pins("B17"), IOStandard("LVCMOS33"), Misc("PULLMODE=UP")),
Subsignal("scl", Pins("C17"), IOStandard("LVCMOS33"), Misc("PULLMODE=UP")),
),
("i2c_bus4_master", 0,
Subsignal("sda", Pins("B18"), IOStandard("LVCMOS33"), Misc("PULLMODE=UP")),
Subsignal("scl", Pins("A18"), IOStandard("LVCMOS33"), Misc("PULLMODE=UP")),
),
("openfsi_master", 0,
Subsignal("clock", Pins("B15"), IOStandard("LVCMOS33")),
Subsignal("data", Pins("C15"), IOStandard("LVCMOS33")),
Subsignal("data_direction", Pins("D15"), IOStandard("LVCMOS33")),
),
("hostspiflash4x", 0,
Subsignal("cs_n", Pins("A14")),
Subsignal("clk", Pins("A12")),
Subsignal("dq", Pins("B13 D13 D11 D14")),
IOStandard("LVCMOS33"),
Misc("SLEWRATE=SLOW"),
Misc("DRIVE=16"),
),
("hostlpcslave", 0,
Subsignal("frame_n", Pins("E15"), Misc("PULLMODE=UP")),
Subsignal("reset_n", Pins("B16"), Misc("PULLMODE=UP")),
Subsignal("pwrdn_n", Pins("A16"), Misc("PULLMODE=UP")),
Subsignal("clkrun_n", Pins("D16"), Misc("PULLMODE=UP")),
Subsignal("tpm_gpio0", Pins("A17"), Misc("PULLMODE=UP")),
Subsignal("addrdata", Pins("C14 E13 C13 A13"), Misc("PULLMODE=UP")),
Subsignal("serirq", Pins("E14"), Misc("PULLMODE=UP")),
Subsignal("clk", Pins("B12"), Misc("PULLMODE=NONE")), # Must be PCLK *not* GR_PCLK or (even worse) a general logic I/O! Pullup NONE helps minimize clock distortion / clock failure on heavily loaded clock lines...
IOStandard("LVCMOS33"),
Misc("SLEWRATE=SLOW"),
Misc("DRIVE=16"),
),
("debug_port_2", 0,
Subsignal("led_15", Pins("B19"), IOStandard("LVCMOS33")),
Subsignal("led_14", Pins("B9"), IOStandard("LVCMOS33")),
Subsignal("led_13", Pins("D6"), IOStandard("LVCMOS33")),
Subsignal("led_12", Pins("D7"), IOStandard("LVCMOS33")),
Subsignal("led_11", Pins("B6"), IOStandard("LVCMOS33")),
Subsignal("led_10", Pins("D9"), IOStandard("LVCMOS33")),
Subsignal("led_9", Pins("C8"), IOStandard("LVCMOS33")),
Subsignal("led_8", Pins("E8"), IOStandard("LVCMOS33")),
),
("lpc_debug_mirror_clock", 0, Pins("E12"), IOStandard("LVCMOS33"))
] ]
# ECP5-hat extension (https://github.com/daveshah1/ecp5-hat) --------------------------------------- # ECP5-hat extension (https://github.com/daveshah1/ecp5-hat) ---------------------------------------
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