One some hardware, forcing cl or/and cwl to non-default values can provide
better results.

common: rename get_cl_cw function to get_default_cl_cwl (and provide retro-compat) and add get_default_cl, get_default_cwl functions.

modules: add MT48LC32M8 SDR module

Required on OrangeCrab that has LDM/UDM swapped.

Now that we are restricting cmd/clk scan in liblitedram, cmd_latency=0 seems
to be workin for all configurations.

Only covers unit-tests for now, Verilator simulation and benchmarks still need to be adapted.

bench/xcu1525: use specific output_dir per channel (to allow // build of bitstreams for the different channels).

ecp5ddrphy: Fix DELAYF initial value

I've seen intermittent failures with recent builds. I suspect it is
related to the DELAYF primitive not being correctly loaded with an
initial value. Holding LOADN LOW ensures a value is correctly
loaded.

init: Cast DDR4 RCD fine_speed to int

Fixes `TypeError: unsupported operand type(s) for |: 'int' and 'float'`
for some clock frequencies.
Signed-off-by: David Shah <dave@ds0.me>