diff --git a/test/reference/ddr3_init.h b/test/reference/ddr3_init.h
index 6a1a209bd28a334038d3d97facff444ef0bd782b..cf88de7ad1552bef167968eda2bf1e96a0ae3739 100644
--- a/test/reference/ddr3_init.h
+++ b/test/reference/ddr3_init.h
@@ -70,7 +70,9 @@ const unsigned long sdram_dfii_pix_rddata_addr[SDRAM_PHY_PHASES] = {
 	CSR_SDRAM_DFII_PI3_RDDATA_ADDR
 };
 
-#define DDRX_MR1 6
+#define DDRX_MR_WRLVL_ADDRESS 1
+#define DDRX_MR_WRLVL_RESET 6
+#define DDRX_MR_WRLVL_BIT 7
 
 static void init_sequence(void)
 {
diff --git a/test/reference/ddr4_init.h b/test/reference/ddr4_init.h
index 54391d00ff52720ca2dce6480e35103a2b6ede2d..a87768ff8a7a21cdb49a0473b80273239672d575 100644
--- a/test/reference/ddr4_init.h
+++ b/test/reference/ddr4_init.h
@@ -71,7 +71,9 @@ const unsigned long sdram_dfii_pix_rddata_addr[SDRAM_PHY_PHASES] = {
 	CSR_SDRAM_DFII_PI3_RDDATA_ADDR
 };
 
-#define DDRX_MR1 769
+#define DDRX_MR_WRLVL_ADDRESS 1
+#define DDRX_MR_WRLVL_RESET 769
+#define DDRX_MR_WRLVL_BIT 7
 
 static void init_sequence(void)
 {