Commit 12d66c11 authored by Jędrzej Boczar's avatar Jędrzej Boczar

phy/model: update DFITimingsChecker to new SDRAMModule timings format

parent 436bfc4f
......@@ -212,10 +212,10 @@ class DFITimingsChecker(Module):
if val is None:
val = 0
elif key in CK_NS:
val = self.ck_ns_to_ps(val, tck)
else:
elif key == "tCK":
val = self.ns_to_ps(val)
else:
val = self.ck_ns_to_ps(val, tck)
new_timings[key] = val
......
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