Fix incorrect configuration of BMC Flash controller during startup

kestrel/src/kestrel.c

@@ -3151,7 +3151,7 @@ static void console_service(void)
 #endif
 
 #if (WITH_SPI)
-static int tercel_spi_flash_init(uintptr_t spi_ctl_cfgaddr, uintptr_t spi_ctl_baseaddr)
+static int tercel_spi_flash_init(uintptr_t spi_ctl_cfgaddr, uintptr_t spi_ctl_baseaddr, int clock_divisor, int enable_4ba)
 {
     int i;
     uint32_t dword;
@@ -3237,11 +3237,14 @@ static int tercel_spi_flash_init(uintptr_t spi_ctl_cfgaddr, uintptr_t spi_ctl_ba
     dword |= ((1 & TERCEL_SPI_PHY_FAST_READ_ENABLE_MASK) << TERCEL_SPI_PHY_FAST_READ_ENABLE_SHIFT);
     write_tercel_register(spi_ctl_cfgaddr, TERCEL_SPI_REG_SYS_PHY_CFG1, dword);
 
-    // Set SPI controller to 4BA mode
-    dword = read_tercel_register(spi_ctl_cfgaddr, TERCEL_SPI_REG_SYS_PHY_CFG1);
-    dword &= ~(TERCEL_SPI_PHY_4BA_ENABLE_MASK << TERCEL_SPI_PHY_4BA_ENABLE_SHIFT);
-    dword |= ((TERCEL_SPI_PHY_4BA_MODE & TERCEL_SPI_PHY_4BA_ENABLE_MASK) << TERCEL_SPI_PHY_4BA_ENABLE_SHIFT);
-    write_tercel_register(spi_ctl_cfgaddr, TERCEL_SPI_REG_SYS_PHY_CFG1, dword);
+    if (enable_4ba)
+    {
+        // Set SPI controller to 4BA mode
+        dword = read_tercel_register(spi_ctl_cfgaddr, TERCEL_SPI_REG_SYS_PHY_CFG1);
+        dword &= ~(TERCEL_SPI_PHY_4BA_ENABLE_MASK << TERCEL_SPI_PHY_4BA_ENABLE_SHIFT);
+        dword |= ((TERCEL_SPI_PHY_4BA_MODE & TERCEL_SPI_PHY_4BA_ENABLE_MASK) << TERCEL_SPI_PHY_4BA_ENABLE_SHIFT);
+        write_tercel_register(spi_ctl_cfgaddr, TERCEL_SPI_REG_SYS_PHY_CFG1, dword);
+    }
 
 #if (ALLOW_SPI_QUAD_MODE)
     // Set SPI controller to QSPI mode
@@ -3251,10 +3254,10 @@ static int tercel_spi_flash_init(uintptr_t spi_ctl_cfgaddr, uintptr_t spi_ctl_ba
     write_tercel_register(spi_ctl_cfgaddr, TERCEL_SPI_REG_SYS_PHY_CFG1, dword);
 #endif
 
-    // Set SPI clock cycle divider to 5
+    // Set SPI clock cycle divider
     dword = read_tercel_register(spi_ctl_cfgaddr, TERCEL_SPI_REG_SYS_PHY_CFG1);
     dword &= ~(TERCEL_SPI_PHY_CLOCK_DIVISOR_MASK << TERCEL_SPI_PHY_CLOCK_DIVISOR_SHIFT);
-    dword |= ((5 & TERCEL_SPI_PHY_CLOCK_DIVISOR_MASK) << TERCEL_SPI_PHY_CLOCK_DIVISOR_SHIFT);
+    dword |= ((clock_divisor & TERCEL_SPI_PHY_CLOCK_DIVISOR_MASK) << TERCEL_SPI_PHY_CLOCK_DIVISOR_SHIFT);
     write_tercel_register(spi_ctl_cfgaddr, TERCEL_SPI_REG_SYS_PHY_CFG1, dword);
 
     // Calculate and dump configured SPI clock speed
@@ -3521,7 +3524,7 @@ int kestrel_init(void)
 
 #if (WITH_SPI)
     // Initialize BMC Flash controller
-    tercel_spi_flash_init(BMCSPIFLASHCFG_BASE, BMCSPIFLASH_BASE);
+    tercel_spi_flash_init(BMCSPIFLASHCFG_BASE, BMCSPIFLASH_BASE, 1, 0);
 
     // Detect and print attached host SPI Flash ID
     KESTREL_LOG("Host SPI flash ID: 0x%08x", read_host_spi_flash_id(BMCSPIFLASHCFG_BASE, BMCSPIFLASH_BASE));
@@ -3530,7 +3533,7 @@ int kestrel_init(void)
     configure_flash_device(BMCSPIFLASHCFG_BASE, BMCSPIFLASH_BASE);
 
     // Initialize host Flash controller
-    tercel_spi_flash_init(HOSTSPIFLASHCFG_BASE, HOSTSPIFLASH_BASE);
+    tercel_spi_flash_init(HOSTSPIFLASHCFG_BASE, HOSTSPIFLASH_BASE, 5, 1);
 
     // Detect and print attached host SPI Flash ID
     KESTREL_LOG("Host SPI flash ID: 0x%08x", read_host_spi_flash_id(HOSTSPIFLASHCFG_BASE, HOSTSPIFLASH_BASE));