General cleanup of index data types and unused variables

parent eb37fb41
...@@ -71,38 +71,38 @@ extern uint8_t irq_unhandled_source_valid; ...@@ -71,38 +71,38 @@ extern uint8_t irq_unhandled_source_valid;
// Interrupt transient POST code buffer // Interrupt transient POST code buffer
static uint16_t post_code_incoming_interrupt_transient_buffer[POST_CODE_INTERRUPT_TRANSIENT_BUFFER_SIZE]; static uint16_t post_code_incoming_interrupt_transient_buffer[POST_CODE_INTERRUPT_TRANSIENT_BUFFER_SIZE];
static int post_code_incoming_interrupt_transient_buffer_pos = 0; static unsigned int post_code_incoming_interrupt_transient_buffer_pos = 0;
static uint8_t post_code_incoming_interrupt_transient_buffer_overflow = 0; static uint8_t post_code_incoming_interrupt_transient_buffer_overflow = 0;
// Interrupt transient VUART1 buffer // Interrupt transient VUART1 buffer
static uint8_t vuart1_incoming_interrupt_transient_buffer[VUART_INTERRUPT_TRANSIENT_BUFFER_SIZE]; static uint8_t vuart1_incoming_interrupt_transient_buffer[VUART_INTERRUPT_TRANSIENT_BUFFER_SIZE];
static int vuart1_incoming_interrupt_transient_buffer_pos = 0; static unsigned int vuart1_incoming_interrupt_transient_buffer_pos = 0;
static uint8_t vuart1_incoming_interrupt_transient_buffer_overflow = 0; static uint8_t vuart1_incoming_interrupt_transient_buffer_overflow = 0;
// BMC to host VUART1 buffer // BMC to host VUART1 buffer
static uint8_t vuart1_outgoing_buffer[VUART_RING_BUFFER_SIZE]; static uint8_t vuart1_outgoing_buffer[VUART_RING_BUFFER_SIZE];
static int vuart1_outgoing_buffer_read_pos = 0; static unsigned int vuart1_outgoing_buffer_read_pos = 0;
static int vuart1_outgoing_buffer_write_pos = 0; static unsigned int vuart1_outgoing_buffer_write_pos = 0;
// Host to BMC VUART1 buffer // Host to BMC VUART1 buffer
static uint8_t vuart1_incoming_buffer[VUART_RING_BUFFER_SIZE]; static uint8_t vuart1_incoming_buffer[VUART_RING_BUFFER_SIZE];
static int vuart1_incoming_buffer_read_pos = 0; static unsigned int vuart1_incoming_buffer_read_pos = 0;
static int vuart1_incoming_buffer_write_pos = 0; static unsigned int vuart1_incoming_buffer_write_pos = 0;
// Interrupt transient VUART2 buffer // Interrupt transient VUART2 buffer
static uint8_t vuart2_incoming_interrupt_transient_buffer[VUART_INTERRUPT_TRANSIENT_BUFFER_SIZE]; static uint8_t vuart2_incoming_interrupt_transient_buffer[VUART_INTERRUPT_TRANSIENT_BUFFER_SIZE];
static int vuart2_incoming_interrupt_transient_buffer_pos = 0; static unsigned int vuart2_incoming_interrupt_transient_buffer_pos = 0;
static uint8_t vuart2_incoming_interrupt_transient_buffer_overflow = 0; static uint8_t vuart2_incoming_interrupt_transient_buffer_overflow = 0;
// // BMC to host VUART2 buffer // // BMC to host VUART2 buffer
// static uint8_t vuart2_outgoing_buffer[VUART_RING_BUFFER_SIZE]; // static uint8_t vuart2_outgoing_buffer[VUART_RING_BUFFER_SIZE];
// static int vuart2_outgoing_buffer_read_pos = 0; // static unsigned int vuart2_outgoing_buffer_read_pos = 0;
// static int vuart2_outgoing_buffer_write_pos = 0; // static unsigned int vuart2_outgoing_buffer_write_pos = 0;
// Host to BMC VUART2 buffer // Host to BMC VUART2 buffer
static uint8_t vuart2_incoming_buffer[VUART_RING_BUFFER_SIZE]; static uint8_t vuart2_incoming_buffer[VUART_RING_BUFFER_SIZE];
// static int vuart2_incoming_buffer_read_pos = 0; // static unsigned int vuart2_incoming_buffer_read_pos = 0;
static int vuart2_incoming_buffer_write_pos = 0; static unsigned int vuart2_incoming_buffer_write_pos = 0;
// IPMI BT buffer // IPMI BT buffer
static ipmi_request_message_t ipmi_bt_interrupt_transient_request; static ipmi_request_message_t ipmi_bt_interrupt_transient_request;
...@@ -740,9 +740,12 @@ void lpc_slave_isr(void) ...@@ -740,9 +740,12 @@ void lpc_slave_isr(void)
{ {
vuart_status = *((volatile uint32_t *)(HOSTLPCSLAVE_BASE + AQUILA_LPC_VUART_BLOCK_OFFSET + 0x0)); vuart_status = *((volatile uint32_t *)(HOSTLPCSLAVE_BASE + AQUILA_LPC_VUART_BLOCK_OFFSET + 0x0));
if (!(vuart_status & AQUILA_LPC_VUART1_FIFO_EMPTY)) { if (!(vuart_status & AQUILA_LPC_VUART1_FIFO_EMPTY)) {
vuart1_incoming_interrupt_transient_buffer[vuart1_incoming_interrupt_transient_buffer_pos] = if (vuart1_incoming_interrupt_transient_buffer_pos < VUART_INTERRUPT_TRANSIENT_BUFFER_SIZE)
(vuart_status >> AQUILA_LPC_VUART1_FIFO_READ_SHIFT) & AQUILA_LPC_VUART1_FIFO_READ_MASK; {
vuart1_incoming_interrupt_transient_buffer_pos++; vuart1_incoming_interrupt_transient_buffer[vuart1_incoming_interrupt_transient_buffer_pos] =
(vuart_status >> AQUILA_LPC_VUART1_FIFO_READ_SHIFT) & AQUILA_LPC_VUART1_FIFO_READ_MASK;
vuart1_incoming_interrupt_transient_buffer_pos++;
}
if (vuart1_incoming_interrupt_transient_buffer_pos >= VUART_INTERRUPT_TRANSIENT_BUFFER_SIZE) if (vuart1_incoming_interrupt_transient_buffer_pos >= VUART_INTERRUPT_TRANSIENT_BUFFER_SIZE)
{ {
// Transient buffer is full // Transient buffer is full
...@@ -755,9 +758,12 @@ void lpc_slave_isr(void) ...@@ -755,9 +758,12 @@ void lpc_slave_isr(void)
} }
} }
if (!(vuart_status & AQUILA_LPC_VUART2_FIFO_EMPTY)) { if (!(vuart_status & AQUILA_LPC_VUART2_FIFO_EMPTY)) {
vuart2_incoming_interrupt_transient_buffer[vuart2_incoming_interrupt_transient_buffer_pos] = if (vuart2_incoming_interrupt_transient_buffer_pos < VUART_INTERRUPT_TRANSIENT_BUFFER_SIZE)
(vuart_status >> AQUILA_LPC_VUART2_FIFO_READ_SHIFT) & AQUILA_LPC_VUART2_FIFO_READ_MASK; {
vuart2_incoming_interrupt_transient_buffer_pos++; vuart2_incoming_interrupt_transient_buffer[vuart2_incoming_interrupt_transient_buffer_pos] =
(vuart_status >> AQUILA_LPC_VUART2_FIFO_READ_SHIFT) & AQUILA_LPC_VUART2_FIFO_READ_MASK;
vuart2_incoming_interrupt_transient_buffer_pos++;
}
if (vuart2_incoming_interrupt_transient_buffer_pos >= VUART_INTERRUPT_TRANSIENT_BUFFER_SIZE) if (vuart2_incoming_interrupt_transient_buffer_pos >= VUART_INTERRUPT_TRANSIENT_BUFFER_SIZE)
{ {
// Transient buffer is full // Transient buffer is full
...@@ -820,8 +826,6 @@ void lpc_slave_isr(void) ...@@ -820,8 +826,6 @@ void lpc_slave_isr(void)
#endif #endif
} }
uint8_t uart_register_bank[8];
uint8_t ipmi_bt_transaction_state; uint8_t ipmi_bt_transaction_state;
static void configure_flash_write_enable(uintptr_t spi_ctl_cfgaddr, uintptr_t spi_ctl_baseaddr, uint8_t enable_writes) static void configure_flash_write_enable(uintptr_t spi_ctl_cfgaddr, uintptr_t spi_ctl_baseaddr, uint8_t enable_writes)
......
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