Commit e1f47f18 authored by atommann's avatar atommann Committed by Tim 'mithro' Ansell

Update .gitmodules

http to https
parent 7656f54d
......@@ -18,7 +18,7 @@
url =
[submodule "litex/soc/cores/cpu/minerva/verilog"]
path = litex/soc/cores/cpu/minerva/verilog
url =
url =
[submodule "litex/soc/cores/cpu/rocket/verilog"]
path = litex/soc/cores/cpu/rocket/verilog
url =
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