Commit c64129dc authored by Florent Kermarrec's avatar Florent Kermarrec

soc/integration/soc_core: list rocket as supported CPU

parent ca4e7811
...@@ -576,7 +576,7 @@ class SoCCore(Module): ...@@ -576,7 +576,7 @@ class SoCCore(Module):
def soc_core_args(parser): def soc_core_args(parser):
parser.add_argument("--cpu-type", default=None, parser.add_argument("--cpu-type", default=None,
help="select CPU: lm32, or1k, picorv32, vexriscv, minerva") help="select CPU: lm32, or1k, picorv32, vexriscv, minerva, rocket")
parser.add_argument("--cpu-variant", default=None, parser.add_argument("--cpu-variant", default=None,
help="select CPU variant") help="select CPU variant")
parser.add_argument("--integrated-rom-size", default=None, type=int, parser.add_argument("--integrated-rom-size", default=None, type=int,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment