soc/integration/soc_core: list rocket as supported CPU

c64129dc · Florent Kermarrec · ca4e7811 · c64129dc
Commit c64129dc authored Jun 07, 2019 by Florent Kermarrec
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litex/soc/integration/soc_core.py litex/soc/integration/soc_core.py +1 -1

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--- a/litex/soc/integration/soc_core.py
+++ b/litex/soc/integration/soc_core.py
@@ -576,7 +576,7 @@ class SoCCore(Module):

 def soc_core_args(parser):
    parser.add_argument("--cpu-type", default=None,
-                        help="select CPU: lm32, or1k, picorv32, vexriscv, minerva")
+                        help="select CPU: lm32, or1k, picorv32, vexriscv, minerva, rocket")
    parser.add_argument("--cpu-variant", default=None,
                        help="select CPU variant")
    parser.add_argument("--integrated-rom-size", default=None, type=int,