Unverified Commit 33d7cc5f authored by enjoy-digital's avatar enjoy-digital Committed by GitHub

Merge pull request #198 from TomKeddie/tomk_20190610_artyspi

boards/arty : Add directly connected spi clk pin 
parents 38a2d89a 5346c368
......@@ -79,13 +79,15 @@ _io = [
IOStandard("LVCMOS33"),
),
("spiflash4x", 0, # clock needs to be accessed through STARTUPE2
("spiflash4x", 0,
Subsignal("cs_n", Pins("L13")),
Subsignal("clk", Pins("L16")),
Subsignal("dq", Pins("K17", "K18", "L14", "M14")),
IOStandard("LVCMOS33")
),
("spiflash", 0, # clock needs to be accessed through STARTUPE2
("spiflash", 0,
Subsignal("cs_n", Pins("L13")),
Subsignal("clk", Pins("L16")),
Subsignal("mosi", Pins("K17")),
Subsignal("miso", Pins("K18")),
Subsignal("wp", Pins("L14")),
......
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